* [Fwd: [Qemu-devel] RFC: avoid #ifdef for target cpu list]
@ 2007-10-11 22:28 J. Mayer
2007-10-12 8:54 ` [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too Dan Kenigsberg
0 siblings, 1 reply; 5+ messages in thread
From: J. Mayer @ 2007-10-11 22:28 UTC (permalink / raw)
To: qemu-devel
-------- Forwarded Message --------
> From: J. Mayer <l_indien@magic.fr>
> Reply-To: qemu-devel@nongnu.org
> To: qemu-devel@nongnu.org
> Subject: [Qemu-devel] RFC: avoid #ifdef for target cpu list
> Date: Wed, 10 Oct 2007 07:14:22 +0200
>
> This tiny patch unifies the -cpu ? option for all cpu that actually can
> handle it.
> It changes the arm_cpu_list to use the same prototype as ppc, mips and
> sparc and add a new define cpu_list in target_xxx/cpu.h
> As the cpu selection is not implemented for all targets, I had to
> protect the call to cpu_list with a #if defined(cpu_list) that will have
> to be suppressed once all target will implement this feature.
>
> Please comment.
If there is no objection about it, I'll apply it today.
--
J. Mayer <l_indien@magic.fr>
Never organized
^ permalink raw reply [flat|nested] 5+ messages in thread* [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too. 2007-10-11 22:28 [Fwd: [Qemu-devel] RFC: avoid #ifdef for target cpu list] J. Mayer @ 2007-10-12 8:54 ` Dan Kenigsberg 2007-10-13 9:56 ` J. Mayer 2007-10-22 0:47 ` Thiemo Seufer 0 siblings, 2 replies; 5+ messages in thread From: Dan Kenigsberg @ 2007-10-12 8:54 UTC (permalink / raw) To: qemu-devel This seems like a good excuse to send my suggested -cpu option for the x86 target. It is just like my previous "take 4", but fits to the newly unified cpu_list. Index: hw/pc.c =================================================================== RCS file: /sources/qemu/qemu/hw/pc.c,v retrieving revision 1.87 diff -u -p -r1.87 pc.c --- hw/pc.c 9 Oct 2007 03:08:56 -0000 1.87 +++ hw/pc.c 12 Oct 2007 08:50:22 -0000 @@ -667,7 +667,7 @@ static void pc_init1(int ram_size, int v DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, - int pci_enabled) + int pci_enabled, const char *cpu_model) { char buf[1024]; int ret, linux_boot, i; @@ -683,6 +683,13 @@ static void pc_init1(int ram_size, int v linux_boot = (kernel_filename != NULL); /* init CPUs */ + if (cpu_model == NULL) + cpu_model = "basic"; + + if (x86_find_cpu_by_name(cpu_model)) { + fprintf(stderr, "Unable to find x86 CPU definition\n"); + exit(1); + } for(i = 0; i < smp_cpus; i++) { env = cpu_init(); if (i != 0) @@ -951,7 +958,7 @@ static void pc_init_pci(int ram_size, in pc_init1(ram_size, vga_ram_size, boot_device, ds, fd_filename, snapshot, kernel_filename, kernel_cmdline, - initrd_filename, 1); + initrd_filename, 1, cpu_model); } static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, @@ -965,7 +972,7 @@ static void pc_init_isa(int ram_size, in pc_init1(ram_size, vga_ram_size, boot_device, ds, fd_filename, snapshot, kernel_filename, kernel_cmdline, - initrd_filename, 0); + initrd_filename, 0, cpu_model); } QEMUMachine pc_machine = { Index: target-i386/cpu.h =================================================================== RCS file: /sources/qemu/qemu/target-i386/cpu.h,v retrieving revision 1.50 diff -u -p -r1.50 cpu.h --- target-i386/cpu.h 27 Sep 2007 16:44:31 -0000 1.50 +++ target-i386/cpu.h 12 Oct 2007 08:50:22 -0000 @@ -274,23 +274,56 @@ #define CPUID_CMOV (1 << 15) #define CPUID_PAT (1 << 16) #define CPUID_PSE36 (1 << 17) +#define CPUID_PN (1 << 18) #define CPUID_CLFLUSH (1 << 19) -/* ... */ +#define CPUID_DTS (1 << 21) +#define CPUID_ACPI (1 << 22) #define CPUID_MMX (1 << 23) #define CPUID_FXSR (1 << 24) #define CPUID_SSE (1 << 25) #define CPUID_SSE2 (1 << 26) +#define CPUID_SS (1 << 27) +#define CPUID_HT (1 << 28) +#define CPUID_TM (1 << 29) +#define CPUID_IA64 (1 << 30) +#define CPUID_PBE (1 << 31) #define CPUID_EXT_SSE3 (1 << 0) #define CPUID_EXT_MONITOR (1 << 3) +#define CPUID_EXT_DSCPL (1 << 4) +#define CPUID_EXT_VMX (1 << 5) +#define CPUID_EXT_SMX (1 << 6) +#define CPUID_EXT_EST (1 << 7) +#define CPUID_EXT_TM2 (1 << 8) +#define CPUID_EXT_SSSE3 (1 << 9) +#define CPUID_EXT_CID (1 << 10) #define CPUID_EXT_CX16 (1 << 13) +#define CPUID_EXT_XTPR (1 << 14) +#define CPUID_EXT_DCA (1 << 17) +#define CPUID_EXT_POPCNT (1 << 22) #define CPUID_EXT2_SYSCALL (1 << 11) +#define CPUID_EXT2_MP (1 << 19) #define CPUID_EXT2_NX (1 << 20) +#define CPUID_EXT2_MMXEXT (1 << 22) #define CPUID_EXT2_FFXSR (1 << 25) +#define CPUID_EXT2_PDPE1GB (1 << 26) +#define CPUID_EXT2_RDTSCP (1 << 27) #define CPUID_EXT2_LM (1 << 29) +#define CPUID_EXT2_3DNOWEXT (1 << 30) +#define CPUID_EXT2_3DNOW (1 << 31) +#define CPUID_EXT3_LAHF_LM (1 << 0) +#define CPUID_EXT3_CMP_LEG (1 << 1) #define CPUID_EXT3_SVM (1 << 2) +#define CPUID_EXT3_EXTAPIC (1 << 3) +#define CPUID_EXT3_CR8LEG (1 << 4) +#define CPUID_EXT3_ABM (1 << 5) +#define CPUID_EXT3_SSE4A (1 << 6) +#define CPUID_EXT3_MISALIGNSSE (1 << 7) +#define CPUID_EXT3_3DNOWPREFETCH (1 << 8) +#define CPUID_EXT3_OSVW (1 << 9) +#define CPUID_EXT3_IBS (1 << 10) #define EXCP00_DIVZ 0 #define EXCP01_SSTP 1 @@ -564,6 +597,9 @@ typedef struct CPUX86State { CPUX86State *cpu_x86_init(void); int cpu_x86_exec(CPUX86State *s); void cpu_x86_close(CPUX86State *s); +int x86_find_cpu_by_name (const unsigned char *name); +void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, + ...)); int cpu_get_pic_interrupt(CPUX86State *s); /* MSDOS compatibility mode FPU exception support */ void cpu_set_ferr(CPUX86State *s); @@ -687,6 +723,7 @@ static inline int cpu_get_time_fast(void #define cpu_exec cpu_x86_exec #define cpu_gen_code cpu_x86_gen_code #define cpu_signal_handler cpu_x86_signal_handler +#define cpu_list x86_cpu_list #include "cpu-all.h" Index: target-i386/helper2.c =================================================================== RCS file: /sources/qemu/qemu/target-i386/helper2.c,v retrieving revision 1.52 diff -u -p -r1.52 helper2.c --- target-i386/helper2.c 23 Sep 2007 15:28:04 -0000 1.52 +++ target-i386/helper2.c 12 Oct 2007 08:50:22 -0000 @@ -46,6 +46,64 @@ int modify_ldt(int func, void *ptr, unsi #endif #endif /* USE_CODE_COPY */ +static struct x86_def_t *x86_cpu_def; +typedef struct x86_def_t x86_def_t; +static int cpu_x86_register (CPUX86State *env, const x86_def_t *def); + +static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, uint32_t *ext_features, uint32_t *ext2_features, uint32_t *ext3_features) +{ + int i; + /* feature flags taken from "Intel Processor Identification and the CPUID + * Instruction" and AMD's "CPUID Specification". In cases of disagreement + * about feature names, the Linux name is used. */ + const char *feature_name[] = { + "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", + "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", + "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx", + "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe", + }; + const char *ext_feature_name[] = { + "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est", + "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, + NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + }; + const char *ext2_feature_name[] = { + "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", + "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mttr", "pge", "mca", "cmov", + "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx", + "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", + }; + const char *ext3_feature_name[] = { + "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", + "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + }; + + for ( i = 0 ; i < 32 ; i++ ) + if (feature_name[i] && !strcmp (flagname, feature_name[i])) { + *features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext_feature_name[i] && !strcmp (flagname, ext_feature_name[i])) { + *ext_features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext2_feature_name[i] && !strcmp (flagname, ext2_feature_name[i])) { + *ext2_features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext3_features[i] && !strcmp (flagname, ext3_feature_name[i])) { + *ext3_features |= 1 << i; + return; + } + fprintf(stderr, "CPU feature %s not found\n", flagname); +} + CPUX86State *cpu_x86_init(void) { CPUX86State *env; @@ -80,71 +138,220 @@ CPUX86State *cpu_x86_init(void) asm volatile ("movl %0, %%fs" : : "r" ((1 << 3) | 7)); } #endif - { - int family, model, stepping; + cpu_x86_register(env, x86_cpu_def); + cpu_reset(env); +#ifdef USE_KQEMU + kqemu_init(env); +#endif + return env; +} + +struct x86_def_t { + const char *name; + uint32_t vendor1, vendor2, vendor3; + int family; + int model; + int stepping; + uint32_t features, ext_features, ext2_features, ext3_features; + uint32_t xlevel; +}; + +#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \ + CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ + CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ + CPUID_PAE | CPUID_SEP | CPUID_APIC) +static x86_def_t x86_defs[] = { #ifdef TARGET_X86_64 - env->cpuid_vendor1 = 0x68747541; /* "Auth" */ - env->cpuid_vendor2 = 0x69746e65; /* "enti" */ - env->cpuid_vendor3 = 0x444d4163; /* "cAMD" */ - family = 6; - model = 2; - stepping = 3; + { + .name = "basic", + .vendor1 = 0x68747541, /* "Auth" */ + .vendor2 = 0x69746e65, /* "enti" */ + .vendor3 = 0x444d4163, /* "cAMD" */ + .family = 6, + .model = 2, + .stepping = 3, + .features = PPRO_FEATURES | + /* these features are needed for Win64 and aren't fully implemented */ + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | + /* this feature is needed for Solaris and isn't fully implemented */ + CPUID_PSE36, + .ext_features = CPUID_EXT_SSE3, + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, + .ext3_features = CPUID_EXT3_SVM, + .xlevel = 0x80000008, + }, #else + { + .name = "basic", + .family = 6, + .model = 3, + .stepping = 3, + .features = PPRO_FEATURES, + .ext_features = CPUID_EXT_SSE3, + .xlevel = 0, + }, +#endif + { + .name = "486", + .family = 4, + .model = 0, + .stepping = 0, + .features = 0x0000000B, + .xlevel = 0, + }, + { + .name = "pentium", + .family = 5, + .model = 4, + .stepping = 3, + .features = 0x008001BF, + .xlevel = 0, + }, + { + .name = "pentium2", + .family = 6, + .model = 5, + .stepping = 2, + .features = 0x0183F9FF, + .xlevel = 0, + }, + { + .name = "pentium3", + .family = 6, + .model = 7, + .stepping = 3, + .features = 0x0383F9FF, + .xlevel = 0, + }, +}; + +int x86_find_cpu_by_name(const unsigned char *cpu_model) +{ + int ret; + unsigned int i; + + char *s = strdup(cpu_model); + char *featurestr, *name = strtok(s, ","); + uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0; + uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0; + int family = -1, model = -1, stepping = -1; + + ret = -1; + x86_cpu_def = NULL; + for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) { + if (strcasecmp(name, x86_defs[i].name) == 0) { + x86_cpu_def = &x86_defs[i]; + ret = 0; + break; + } + } + if (!x86_cpu_def) + goto error; + + featurestr = strtok(NULL, ","); + + while (featurestr) { + char *val; + if (featurestr[0] == '+') { + add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features); + } else if (featurestr[0] == '-') { + add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features); + } else if ((val = strchr(featurestr, '='))) { + *val = 0; val++; + if (!strcmp(featurestr, "family")) { + char *err; + family = strtol(val, &err, 10); + if (!*val || *err || family < 0) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->family = family; + } else if (!strcmp(featurestr, "model")) { + char *err; + model = strtol(val, &err, 10); + if (!*val || *err || model < 0 || model > 0xf) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->model = model; + } else if (!strcmp(featurestr, "stepping")) { + char *err; + stepping = strtol(val, &err, 10); + if (!*val || *err || stepping < 0 || stepping > 0xf) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->stepping = stepping; + } else { + fprintf(stderr, "unregnized feature %s\n", featurestr); + x86_cpu_def = 0; + goto error; + } + } else { + fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr); + x86_cpu_def = 0; + goto error; + } + featurestr = strtok(NULL, ","); + } + x86_cpu_def->features |= plus_features; + x86_cpu_def->ext_features |= plus_ext_features; + x86_cpu_def->ext2_features |= plus_ext2_features; + x86_cpu_def->ext3_features |= plus_ext3_features; + x86_cpu_def->features &= ~minus_features; + x86_cpu_def->ext_features &= ~minus_ext_features; + x86_cpu_def->ext2_features &= ~minus_ext2_features; + x86_cpu_def->ext3_features &= ~minus_ext3_features; + +error: + free(s); + return ret; +} + +void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)) +{ + unsigned int i; + + for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) + (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name); +} + +int cpu_x86_register (CPUX86State *env, const x86_def_t *def) +{ + if (def->vendor1) { + env->cpuid_vendor1 = def->vendor1; + env->cpuid_vendor2 = def->vendor2; + env->cpuid_vendor3 = def->vendor3; + } else { env->cpuid_vendor1 = 0x756e6547; /* "Genu" */ env->cpuid_vendor2 = 0x49656e69; /* "ineI" */ env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */ -#if 0 - /* pentium 75-200 */ - family = 5; - model = 2; - stepping = 11; -#else - /* pentium pro */ - family = 6; - model = 3; - stepping = 3; -#endif -#endif - env->cpuid_level = 2; - env->cpuid_version = (family << 8) | (model << 4) | stepping; - env->cpuid_features = (CPUID_FP87 | CPUID_DE | CPUID_PSE | - CPUID_TSC | CPUID_MSR | CPUID_MCE | - CPUID_CX8 | CPUID_PGE | CPUID_CMOV | - CPUID_PAT); - env->pat = 0x0007040600070406ULL; - env->cpuid_ext3_features = CPUID_EXT3_SVM; - env->cpuid_ext_features = CPUID_EXT_SSE3; - env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP; - env->cpuid_features |= CPUID_APIC; - env->cpuid_xlevel = 0x8000000e; - { - const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; - int c, len, i; - len = strlen(model_id); - for(i = 0; i < 48; i++) { - if (i >= len) - c = '\0'; - else - c = model_id[i]; - env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); - } + } + env->cpuid_level = 2; + env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping; + env->cpuid_features = def->features; + env->pat = 0x0007040600070406ULL; + env->cpuid_ext_features = def->ext_features; + env->cpuid_ext2_features = def->ext2_features; + env->cpuid_xlevel = def->xlevel; + env->cpuid_ext3_features = def->ext3_features; + { + const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; + int c, len, i; + len = strlen(model_id); + for(i = 0; i < 48; i++) { + if (i >= len) + c = '\0'; + else + c = model_id[i]; + env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); } -#ifdef TARGET_X86_64 - /* currently not enabled for std i386 because not fully tested */ - env->cpuid_ext2_features = (env->cpuid_features & 0x0183F3FF); - env->cpuid_ext2_features |= CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX; - - /* these features are needed for Win64 and aren't fully implemented */ - env->cpuid_features |= CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA; - /* this feature is needed for Solaris and isn't fully implemented */ - env->cpuid_features |= CPUID_PSE36; -#endif } - cpu_reset(env); -#ifdef USE_KQEMU - kqemu_init(env); -#endif - return env; + return 0; } /* NOTE: must be called outside the CPU execute loop */ @@ -184,7 +391,7 @@ void cpu_reset(CPUX86State *env) cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0); env->eip = 0xfff0; - env->regs[R_EDX] = 0x600; /* indicate P6 processor */ + env->regs[R_EDX] = env->cpuid_version; env->eflags = 0x2; ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too. 2007-10-12 8:54 ` [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too Dan Kenigsberg @ 2007-10-13 9:56 ` J. Mayer 2007-10-22 0:47 ` Thiemo Seufer 1 sibling, 0 replies; 5+ messages in thread From: J. Mayer @ 2007-10-13 9:56 UTC (permalink / raw) To: qemu-devel On Fri, 2007-10-12 at 10:54 +0200, Dan Kenigsberg wrote: > This seems like a good excuse to send my suggested -cpu option for the > x86 target. It is just like my previous "take 4", but fits to the newly > unified cpu_list. I don't know x86 so well to comment the x86 CPU definitions, but having this option for x86 too is welcome... [...] -- J. Mayer <l_indien@magic.fr> Never organized ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too. 2007-10-12 8:54 ` [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too Dan Kenigsberg 2007-10-13 9:56 ` J. Mayer @ 2007-10-22 0:47 ` Thiemo Seufer 2007-10-22 8:45 ` Dan Kenigsberg 1 sibling, 1 reply; 5+ messages in thread From: Thiemo Seufer @ 2007-10-22 0:47 UTC (permalink / raw) To: Dan Kenigsberg; +Cc: qemu-devel Dan Kenigsberg wrote: > This seems like a good excuse to send my suggested -cpu option for the > x86 target. It is just like my previous "take 4", but fits to the newly > unified cpu_list. Leads to an instant segfault for the i386 usermode emulation. Thiemo ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too. 2007-10-22 0:47 ` Thiemo Seufer @ 2007-10-22 8:45 ` Dan Kenigsberg 0 siblings, 0 replies; 5+ messages in thread From: Dan Kenigsberg @ 2007-10-22 8:45 UTC (permalink / raw) To: Thiemo Seufer; +Cc: qemu-devel On Mon, Oct 22, 2007 at 01:47:42AM +0100, Thiemo Seufer wrote: > Dan Kenigsberg wrote: > > This seems like a good excuse to send my suggested -cpu option for the > > x86 target. It is just like my previous "take 4", but fits to the newly > > unified cpu_list. > > Leads to an instant segfault for the i386 usermode emulation. > Ouch. You are NOT my alpha tester, but I suspect that --- a/target-i386/helper2.c +++ b/target-i386/helper2.c @@ -97,7 +97,7 @@ static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, uint32_t return; } for ( i = 0 ; i < 32 ; i++ ) - if (ext3_feature[i] && !strcmp (flagname, ext3_feature_name[i])) { + if (ext3_feature_name[i] && !strcmp (flagname, ext3_feature_name[i])) { *ext3_features |= 1 << i; return; } is my embarrassing typo. I resubmit the whole thing below: diff --git a/hw/pc.c b/hw/pc.c index c561cbf..a0c824f 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -667,7 +667,7 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, - int pci_enabled) + int pci_enabled, const char *cpu_model) { char buf[1024]; int ret, linux_boot, i; @@ -683,6 +683,13 @@ static void pc_init1(int ram_size, int vga_ram_size, int boot_device, linux_boot = (kernel_filename != NULL); /* init CPUs */ + if (cpu_model == NULL) + cpu_model = "basic"; + + if (x86_find_cpu_by_name(cpu_model)) { + fprintf(stderr, "Unable to find x86 CPU definition\n"); + exit(1); + } for(i = 0; i < smp_cpus; i++) { env = cpu_init(); if (i != 0) @@ -951,7 +958,7 @@ static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, pc_init1(ram_size, vga_ram_size, boot_device, ds, fd_filename, snapshot, kernel_filename, kernel_cmdline, - initrd_filename, 1); + initrd_filename, 1, cpu_model); } static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, @@ -965,7 +972,7 @@ static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, pc_init1(ram_size, vga_ram_size, boot_device, ds, fd_filename, snapshot, kernel_filename, kernel_cmdline, - initrd_filename, 0); + initrd_filename, 0, cpu_model); } QEMUMachine pc_machine = { diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 2341990..e92fc31 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -274,23 +274,56 @@ #define CPUID_CMOV (1 << 15) #define CPUID_PAT (1 << 16) #define CPUID_PSE36 (1 << 17) +#define CPUID_PN (1 << 18) #define CPUID_CLFLUSH (1 << 19) -/* ... */ +#define CPUID_DTS (1 << 21) +#define CPUID_ACPI (1 << 22) #define CPUID_MMX (1 << 23) #define CPUID_FXSR (1 << 24) #define CPUID_SSE (1 << 25) #define CPUID_SSE2 (1 << 26) +#define CPUID_SS (1 << 27) +#define CPUID_HT (1 << 28) +#define CPUID_TM (1 << 29) +#define CPUID_IA64 (1 << 30) +#define CPUID_PBE (1 << 31) #define CPUID_EXT_SSE3 (1 << 0) #define CPUID_EXT_MONITOR (1 << 3) +#define CPUID_EXT_DSCPL (1 << 4) +#define CPUID_EXT_VMX (1 << 5) +#define CPUID_EXT_SMX (1 << 6) +#define CPUID_EXT_EST (1 << 7) +#define CPUID_EXT_TM2 (1 << 8) +#define CPUID_EXT_SSSE3 (1 << 9) +#define CPUID_EXT_CID (1 << 10) #define CPUID_EXT_CX16 (1 << 13) +#define CPUID_EXT_XTPR (1 << 14) +#define CPUID_EXT_DCA (1 << 17) +#define CPUID_EXT_POPCNT (1 << 22) #define CPUID_EXT2_SYSCALL (1 << 11) +#define CPUID_EXT2_MP (1 << 19) #define CPUID_EXT2_NX (1 << 20) +#define CPUID_EXT2_MMXEXT (1 << 22) #define CPUID_EXT2_FFXSR (1 << 25) +#define CPUID_EXT2_PDPE1GB (1 << 26) +#define CPUID_EXT2_RDTSCP (1 << 27) #define CPUID_EXT2_LM (1 << 29) +#define CPUID_EXT2_3DNOWEXT (1 << 30) +#define CPUID_EXT2_3DNOW (1 << 31) +#define CPUID_EXT3_LAHF_LM (1 << 0) +#define CPUID_EXT3_CMP_LEG (1 << 1) #define CPUID_EXT3_SVM (1 << 2) +#define CPUID_EXT3_EXTAPIC (1 << 3) +#define CPUID_EXT3_CR8LEG (1 << 4) +#define CPUID_EXT3_ABM (1 << 5) +#define CPUID_EXT3_SSE4A (1 << 6) +#define CPUID_EXT3_MISALIGNSSE (1 << 7) +#define CPUID_EXT3_3DNOWPREFETCH (1 << 8) +#define CPUID_EXT3_OSVW (1 << 9) +#define CPUID_EXT3_IBS (1 << 10) #define EXCP00_DIVZ 0 #define EXCP01_SSTP 1 @@ -566,6 +599,9 @@ typedef struct CPUX86State { CPUX86State *cpu_x86_init(void); int cpu_x86_exec(CPUX86State *s); void cpu_x86_close(CPUX86State *s); +int x86_find_cpu_by_name (const unsigned char *name); +void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, + ...)); int cpu_get_pic_interrupt(CPUX86State *s); /* MSDOS compatibility mode FPU exception support */ void cpu_set_ferr(CPUX86State *s); @@ -689,6 +725,7 @@ static inline int cpu_get_time_fast(void) #define cpu_exec cpu_x86_exec #define cpu_gen_code cpu_x86_gen_code #define cpu_signal_handler cpu_x86_signal_handler +#define cpu_list x86_cpu_list /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-i386/helper2.c b/target-i386/helper2.c index 7d5275c..d3e175e 100644 --- a/target-i386/helper2.c +++ b/target-i386/helper2.c @@ -46,6 +46,64 @@ int modify_ldt(int func, void *ptr, unsigned long bytecount) #endif #endif /* USE_CODE_COPY */ +static struct x86_def_t *x86_cpu_def; +typedef struct x86_def_t x86_def_t; +static int cpu_x86_register (CPUX86State *env, const x86_def_t *def); + +static void add_flagname_to_bitmaps(char *flagname, uint32_t *features, uint32_t *ext_features, uint32_t *ext2_features, uint32_t *ext3_features) +{ + int i; + /* feature flags taken from "Intel Processor Identification and the CPUID + * Instruction" and AMD's "CPUID Specification". In cases of disagreement + * about feature names, the Linux name is used. */ + const char *feature_name[] = { + "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", + "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov", + "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx", + "fxsr", "sse", "sse2", "ss", "ht" /* Intel htt */, "tm", "ia64", "pbe", + }; + const char *ext_feature_name[] = { + "pni" /* Intel,AMD sse3 */, NULL, NULL, "monitor", "ds_cpl", "vmx", NULL /* Linux smx */, "est", + "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL, + NULL, NULL, "dca", NULL, NULL, NULL, NULL, "popcnt", + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + }; + const char *ext2_feature_name[] = { + "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", + "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", "mttr", "pge", "mca", "cmov", + "pat", "pse36", NULL, NULL /* Linux mp */, "nx" /* Intel xd */, NULL, "mmxext", "mmx", + "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", + }; + const char *ext3_feature_name[] = { + "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", + "3dnowprefetch", "osvw", NULL /* Linux ibs */, NULL, "skinit", "wdt", NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, + }; + + for ( i = 0 ; i < 32 ; i++ ) + if (feature_name[i] && !strcmp (flagname, feature_name[i])) { + *features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext_feature_name[i] && !strcmp (flagname, ext_feature_name[i])) { + *ext_features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext2_feature_name[i] && !strcmp (flagname, ext2_feature_name[i])) { + *ext2_features |= 1 << i; + return; + } + for ( i = 0 ; i < 32 ; i++ ) + if (ext3_feature_name[i] && !strcmp (flagname, ext3_feature_name[i])) { + *ext3_features |= 1 << i; + return; + } + fprintf(stderr, "CPU feature %s not found\n", flagname); +} + CPUX86State *cpu_x86_init(void) { CPUX86State *env; @@ -80,71 +138,220 @@ CPUX86State *cpu_x86_init(void) asm volatile ("movl %0, %%fs" : : "r" ((1 << 3) | 7)); } #endif - { - int family, model, stepping; + cpu_x86_register(env, x86_cpu_def); + cpu_reset(env); +#ifdef USE_KQEMU + kqemu_init(env); +#endif + return env; +} + +struct x86_def_t { + const char *name; + uint32_t vendor1, vendor2, vendor3; + int family; + int model; + int stepping; + uint32_t features, ext_features, ext2_features, ext3_features; + uint32_t xlevel; +}; + +#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \ + CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ + CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ + CPUID_PAE | CPUID_SEP | CPUID_APIC) +static x86_def_t x86_defs[] = { #ifdef TARGET_X86_64 - env->cpuid_vendor1 = 0x68747541; /* "Auth" */ - env->cpuid_vendor2 = 0x69746e65; /* "enti" */ - env->cpuid_vendor3 = 0x444d4163; /* "cAMD" */ - family = 6; - model = 2; - stepping = 3; -#else - env->cpuid_vendor1 = 0x756e6547; /* "Genu" */ - env->cpuid_vendor2 = 0x49656e69; /* "ineI" */ - env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */ -#if 0 - /* pentium 75-200 */ - family = 5; - model = 2; - stepping = 11; + { + .name = "basic", + .vendor1 = 0x68747541, /* "Auth" */ + .vendor2 = 0x69746e65, /* "enti" */ + .vendor3 = 0x444d4163, /* "cAMD" */ + .family = 6, + .model = 2, + .stepping = 3, + .features = PPRO_FEATURES | + /* these features are needed for Win64 and aren't fully implemented */ + CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | + /* this feature is needed for Solaris and isn't fully implemented */ + CPUID_PSE36, + .ext_features = CPUID_EXT_SSE3, + .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, + .ext3_features = CPUID_EXT3_SVM, + .xlevel = 0x80000008, + }, #else - /* pentium pro */ - family = 6; - model = 3; - stepping = 3; -#endif + { + .name = "basic", + .family = 6, + .model = 3, + .stepping = 3, + .features = PPRO_FEATURES, + .ext_features = CPUID_EXT_SSE3, + .xlevel = 0, + }, #endif - env->cpuid_level = 2; - env->cpuid_version = (family << 8) | (model << 4) | stepping; - env->cpuid_features = (CPUID_FP87 | CPUID_DE | CPUID_PSE | - CPUID_TSC | CPUID_MSR | CPUID_MCE | - CPUID_CX8 | CPUID_PGE | CPUID_CMOV | - CPUID_PAT); - env->pat = 0x0007040600070406ULL; - env->cpuid_ext3_features = CPUID_EXT3_SVM; - env->cpuid_ext_features = CPUID_EXT_SSE3; - env->cpuid_features |= CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | CPUID_PAE | CPUID_SEP; - env->cpuid_features |= CPUID_APIC; - env->cpuid_xlevel = 0x8000000e; - { - const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; - int c, len, i; - len = strlen(model_id); - for(i = 0; i < 48; i++) { - if (i >= len) - c = '\0'; - else - c = model_id[i]; - env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); + { + .name = "486", + .family = 4, + .model = 0, + .stepping = 0, + .features = 0x0000000B, + .xlevel = 0, + }, + { + .name = "pentium", + .family = 5, + .model = 4, + .stepping = 3, + .features = 0x008001BF, + .xlevel = 0, + }, + { + .name = "pentium2", + .family = 6, + .model = 5, + .stepping = 2, + .features = 0x0183F9FF, + .xlevel = 0, + }, + { + .name = "pentium3", + .family = 6, + .model = 7, + .stepping = 3, + .features = 0x0383F9FF, + .xlevel = 0, + }, +}; + +int x86_find_cpu_by_name(const unsigned char *cpu_model) +{ + int ret; + unsigned int i; + + char *s = strdup(cpu_model); + char *featurestr, *name = strtok(s, ","); + uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0; + uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0; + int family = -1, model = -1, stepping = -1; + + ret = -1; + x86_cpu_def = NULL; + for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) { + if (strcasecmp(name, x86_defs[i].name) == 0) { + x86_cpu_def = &x86_defs[i]; + ret = 0; + break; + } + } + if (!x86_cpu_def) + goto error; + + featurestr = strtok(NULL, ","); + + while (featurestr) { + char *val; + if (featurestr[0] == '+') { + add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features); + } else if (featurestr[0] == '-') { + add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features); + } else if ((val = strchr(featurestr, '='))) { + *val = 0; val++; + if (!strcmp(featurestr, "family")) { + char *err; + family = strtol(val, &err, 10); + if (!*val || *err || family < 0) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->family = family; + } else if (!strcmp(featurestr, "model")) { + char *err; + model = strtol(val, &err, 10); + if (!*val || *err || model < 0 || model > 0xf) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->model = model; + } else if (!strcmp(featurestr, "stepping")) { + char *err; + stepping = strtol(val, &err, 10); + if (!*val || *err || stepping < 0 || stepping > 0xf) { + fprintf(stderr, "bad numerical value %s\n", val); + x86_cpu_def = 0; + goto error; + } + x86_cpu_def->stepping = stepping; + } else { + fprintf(stderr, "unregnized feature %s\n", featurestr); + x86_cpu_def = 0; + goto error; } + } else { + fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr); + x86_cpu_def = 0; + goto error; } -#ifdef TARGET_X86_64 - /* currently not enabled for std i386 because not fully tested */ - env->cpuid_ext2_features = (env->cpuid_features & 0x0183F3FF); - env->cpuid_ext2_features |= CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX; + featurestr = strtok(NULL, ","); + } + x86_cpu_def->features |= plus_features; + x86_cpu_def->ext_features |= plus_ext_features; + x86_cpu_def->ext2_features |= plus_ext2_features; + x86_cpu_def->ext3_features |= plus_ext3_features; + x86_cpu_def->features &= ~minus_features; + x86_cpu_def->ext_features &= ~minus_ext_features; + x86_cpu_def->ext2_features &= ~minus_ext2_features; + x86_cpu_def->ext3_features &= ~minus_ext3_features; + +error: + free(s); + return ret; +} - /* these features are needed for Win64 and aren't fully implemented */ - env->cpuid_features |= CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA; - /* this feature is needed for Solaris and isn't fully implemented */ - env->cpuid_features |= CPUID_PSE36; -#endif +void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)) +{ + unsigned int i; + + for (i = 0; i < sizeof(x86_defs) / sizeof(x86_def_t); i++) + (*cpu_fprintf)(f, "x86 %16s\n", x86_defs[i].name); +} + +int cpu_x86_register (CPUX86State *env, const x86_def_t *def) +{ + if (def->vendor1) { + env->cpuid_vendor1 = def->vendor1; + env->cpuid_vendor2 = def->vendor2; + env->cpuid_vendor3 = def->vendor3; + } else { + env->cpuid_vendor1 = 0x756e6547; /* "Genu" */ + env->cpuid_vendor2 = 0x49656e69; /* "ineI" */ + env->cpuid_vendor3 = 0x6c65746e; /* "ntel" */ } - cpu_reset(env); -#ifdef USE_KQEMU - kqemu_init(env); -#endif - return env; + env->cpuid_level = 2; + env->cpuid_version = (def->family << 8) | (def->model << 4) | def->stepping; + env->cpuid_features = def->features; + env->pat = 0x0007040600070406ULL; + env->cpuid_ext_features = def->ext_features; + env->cpuid_ext2_features = def->ext2_features; + env->cpuid_xlevel = def->xlevel; + env->cpuid_ext3_features = def->ext3_features; + { + const char *model_id = "QEMU Virtual CPU version " QEMU_VERSION; + int c, len, i; + len = strlen(model_id); + for(i = 0; i < 48; i++) { + if (i >= len) + c = '\0'; + else + c = model_id[i]; + env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); + } + } + return 0; } /* NOTE: must be called outside the CPU execute loop */ @@ -184,7 +391,7 @@ void cpu_reset(CPUX86State *env) cpu_x86_load_seg_cache(env, R_GS, 0, 0, 0xffff, 0); env->eip = 0xfff0; - env->regs[R_EDX] = 0x600; /* indicate P6 processor */ + env->regs[R_EDX] = env->cpuid_version; env->eflags = 0x2; ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2007-10-22 8:44 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2007-10-11 22:28 [Fwd: [Qemu-devel] RFC: avoid #ifdef for target cpu list] J. Mayer 2007-10-12 8:54 ` [Qemu-devel] RFC: avoid #ifdef for target cpu list - for x86, too Dan Kenigsberg 2007-10-13 9:56 ` J. Mayer 2007-10-22 0:47 ` Thiemo Seufer 2007-10-22 8:45 ` Dan Kenigsberg
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