[Qemu-devel] Re: emu errors for creqv,crnand,crnor,crorc ?

[Jocelyn Mayer <l_indien@magic.fr>]

On Wed, 2007-10-31 at 14:39 +0100, Julian Seward wrote:
> > > way around.  Below is a simple test case.  On QEMU it prints
> > >
> > >   result is 000fc000
> > >
> > > and on a real 7447
> > >
> > >   result is 00004000
> > >
> >  What is strange is that 0xFC + 0x04... I will have to check all the CR
> > ops, I guess...
> 
> Another strange thing is that 000fc000 does not have 'fc' byte-aligned
> inside CR, if you see what I mean.  If it was 0000fc00 or 00fc0000, some
> byte-inversion mistake would seem likely.
> 
> This isn't a 74xx specific result.  I'm sure any ppc should produce
> 00004000.  The test is very simple: make CR=0 then do crorc 17,14,15.
> So only 1 bit in CR will then be set - all others are zero.

I guess the problem is the CRops are implemented this way:
- get the bit from crfA
- get the bit from crfB
- do the logical operation
- store the result bit
As the faulting ops are the one that do a complement, it's quite sure
that the problem is that the result bit is not properly masked before
being stored. Then the '4' bit is OK, but you also get 'noisy' other
bits that should have been masked before the store.
As the condition register is stored as 8 4 bits registers, this would
affect only the updated CR field.