From: Thayne Harbaugh <thayne@c2.net>
To: Paul Brook <paul@codesourcery.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] arm eabi TLS
Date: Wed, 12 Dec 2007 18:15:40 -0700 [thread overview]
Message-ID: <1197508540.3640.2.camel@phantasm.home.enterpriseandprosperity.com> (raw)
In-Reply-To: <200712130121.04204.paul@codesourcery.com>
On Thu, 2007-12-13 at 01:21 +0000, Paul Brook wrote:
> > - It would be good to limit the changes in the CPU emulation code to
> > handle the TLS. For example, on MIPS, the TLS register must not be
> > stored in the CPU state. Same for ARM.
>
> I disagree. The TLS register is part of the CPU state. On many machines
> (including ARMv6 CPUs) it's an actual CPU register. I'm fairly sure the same
> is true for recent MIPS revisions.
I agree with Paul. Some archs actually use a CPU register and require
the kernel to help manage TLS. Other archs can manage TLS completely in
user space. It's been a while since I've investigated all the details
for each arch but I'll go review it.
next prev parent reply other threads:[~2007-12-13 1:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-12-12 0:44 [Qemu-devel] [PATCH] arm eabi TLS Thayne Harbaugh
2007-12-12 1:29 ` Paul Brook
2007-12-12 23:03 ` Fabrice Bellard
2007-12-13 1:21 ` Paul Brook
2007-12-13 1:15 ` Thayne Harbaugh [this message]
2008-01-28 18:27 ` Felipe Contreras
2008-04-04 15:03 ` Marc-André Lureau
2008-04-04 17:48 ` Stuart Anderson
2008-05-05 15:12 ` Felipe Contreras
2007-12-13 8:57 ` Fabrice Bellard
2007-12-13 13:28 ` Daniel Jacobowitz
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