qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
	qemu-devel@nongnu.org
Cc: Alistair.Francis@wdc.com, palmer@dabbelt.com,
	eduardo@habkost.net, marcel.apfelbaum@gmail.com,
	philmd@linaro.org, wangyanan55@huawei.com,
	richard.henderson@linaro.org, pbonzini@redhat.com,
	bin.meng@windriver.com, liweiwei@iscas.ac.cn,
	qemu-riscv@nongnu.org, ajones@ventanamicro.com
Subject: Re: [RFC PATCH 2/3] target/riscv: Add API list_cpu_props
Date: Mon, 28 Aug 2023 16:47:20 +0800	[thread overview]
Message-ID: <11a0292f-5a43-88e2-a06f-6a55a4bc241e@linux.alibaba.com> (raw)
In-Reply-To: <18c74a22-c4bc-248e-eeef-3120959cf45a@ventanamicro.com>


On 2023/8/25 21:46, Daniel Henrique Barboza wrote:
>
>
> On 8/25/23 09:16, LIU Zhiwei wrote:
>> This API used for output current configuration for one specified CPU.
>> Currently only RISC-V frontend implements this API.
>>
>> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
>> ---
>>   cpu.c                     |  8 ++++++++
>>   include/exec/cpu-common.h |  1 +
>>   target/riscv/cpu.c        | 10 ++++++++++
>>   target/riscv/cpu.h        |  2 ++
>>   4 files changed, 21 insertions(+)
>>
>> diff --git a/cpu.c b/cpu.c
>> index e1a9239d0f..03a313cd72 100644
>> --- a/cpu.c
>> +++ b/cpu.c
>> @@ -299,6 +299,14 @@ void list_cpus(void)
>>   #endif
>>   }
>>   +void list_cpu_props(CPUState *cs)
>> +{
>> +    /* XXX: implement xxx_cpu_list_props for targets that still miss 
>> it */
>> +#if defined(cpu_list_props)
>> +    cpu_list_props(cs);
>> +#endif
>> +}
>> +
>>   #if defined(CONFIG_USER_ONLY)
>>   void tb_invalidate_phys_addr(hwaddr addr)
>>   {
>> diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h
>> index 87dc9a752c..b3160d9218 100644
>> --- a/include/exec/cpu-common.h
>> +++ b/include/exec/cpu-common.h
>> @@ -166,5 +166,6 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
>>     /* vl.c */
>>   void list_cpus(void);
>> +void list_cpu_props(CPUState *);
>>     #endif /* CPU_COMMON_H */
>> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
>> index 6b93b04453..3ea18de06f 100644
>> --- a/target/riscv/cpu.c
>> +++ b/target/riscv/cpu.c
>> @@ -2226,6 +2226,16 @@ void riscv_cpu_list(void)
>>       g_slist_free(list);
>>   }
>>   +void riscv_cpu_list_props(CPUState *cs)
>> +{
>> +    char *enabled_isa;
>> +
>> +    enabled_isa = riscv_isa_string(RISCV_CPU(cs));
>> +    qemu_printf("Enable extension:\n");
>
> I suggest "Enabled extensions". LGTM otherwise.

Fixed, thanks.

Zhiwei

>
> Daniel
>
>> +    qemu_printf("\t%s\n", enabled_isa);
>> +    /* TODO: output all user configurable options and all possible 
>> extensions */
>> +}
>> +
>>   #define DEFINE_CPU(type_name, initfn)      \
>>       {                                      \
>>           .name = type_name,                 \
>> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
>> index 6ea22e0eea..af1d47605b 100644
>> --- a/target/riscv/cpu.h
>> +++ b/target/riscv/cpu.h
>> @@ -443,9 +443,11 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr 
>> address, int size,
>>                           bool probe, uintptr_t retaddr);
>>   char *riscv_isa_string(RISCVCPU *cpu);
>>   void riscv_cpu_list(void);
>> +void riscv_cpu_list_props(CPUState *cs);
>>   void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp);
>>     #define cpu_list riscv_cpu_list
>> +#define cpu_list_props riscv_cpu_list_props
>>   #define cpu_mmu_index riscv_cpu_mmu_index
>>     #ifndef CONFIG_USER_ONLY


  reply	other threads:[~2023-08-28  8:48 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-25 12:16 [RFC PATCH 0/3] Add API for list cpu extensions LIU Zhiwei
2023-08-25 12:16 ` [RFC PATCH 1/3] cpu: Add new API cpu_type_by_name LIU Zhiwei
2023-08-28 12:25   ` Philippe Mathieu-Daudé
2023-08-25 12:16 ` [RFC PATCH 2/3] target/riscv: Add API list_cpu_props LIU Zhiwei
2023-08-25 13:46   ` Daniel Henrique Barboza
2023-08-28  8:47     ` LIU Zhiwei [this message]
2023-08-25 12:16 ` [RFC PATCH 3/3] softmmu/vl: Add qemu_cpu_opts QemuOptsList LIU Zhiwei
2023-08-25 15:58   ` Andrew Jones
2023-08-28  2:06     ` LIU Zhiwei
2023-08-25 14:15 ` [RFC PATCH 0/3] Add API for list cpu extensions Daniel Henrique Barboza

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=11a0292f-5a43-88e2-a06f-6a55a4bc241e@linux.alibaba.com \
    --to=zhiwei_liu@linux.alibaba.com \
    --cc=Alistair.Francis@wdc.com \
    --cc=ajones@ventanamicro.com \
    --cc=bin.meng@windriver.com \
    --cc=dbarboza@ventanamicro.com \
    --cc=eduardo@habkost.net \
    --cc=liweiwei@iscas.ac.cn \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=palmer@dabbelt.com \
    --cc=pbonzini@redhat.com \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=wangyanan55@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).