From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>, "Bin Meng" <bmeng.cn@gmail.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:SD (Secure Card)" <qemu-block@nongnu.org>
Cc: troy_lee@aspeedtech.com, yunlin.tang@aspeedtech.com
Subject: Re: [PATCH v1 6/8] hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1
Date: Mon, 4 Nov 2024 11:28:22 +0100 [thread overview]
Message-ID: <11a071cf-1006-4945-ab2e-38a18ff8ab19@linaro.org> (raw)
In-Reply-To: <20241029091729.3317512-7-jamin_lin@aspeedtech.com>
On 29/10/24 06:17, Jamin Lin wrote:
> The size of SDHCI capabilities register is 64bits, so introduces new
> Capabilities Register 2 for SD slot 0 (0x144) and SD slot1 (0x244).
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> ---
> hw/sd/aspeed_sdhci.c | 40 +++++++++++++++++++++++++++++-----------
> 1 file changed, 29 insertions(+), 11 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2024-11-04 10:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-29 9:17 [PATCH v1 0/8] Support RTC for AST2700 Jamin Lin via
2024-10-29 9:17 ` [PATCH v1 1/8] aspeed/soc: " Jamin Lin via
2024-11-02 14:59 ` [SPAM] " Cédric Le Goater
2024-10-29 9:17 ` [PATCH v1 2/8] hw/timer/aspeed: Fix coding style Jamin Lin via
2024-11-02 15:01 ` [SPAM] " Cédric Le Goater
2024-10-29 9:17 ` [PATCH v1 3/8] hw/timer/aspeed: Fix interrupt status does not be cleared for AST2600 Jamin Lin via
2024-10-29 23:43 ` Andrew Jeffery
2024-11-02 14:59 ` [SPAM] " Cédric Le Goater
2024-10-29 9:17 ` [PATCH v1 4/8] hw/sd/sdhci: Fix coding style Jamin Lin via
2024-11-02 15:00 ` [SPAM] " Cédric Le Goater
2024-10-29 9:17 ` [PATCH v1 5/8] hw/sd/sdhci: Introduce a new Write Protected pin inverted property Jamin Lin via
2024-10-29 23:50 ` Andrew Jeffery
2024-10-30 2:10 ` Jamin Lin
2024-10-29 9:17 ` [PATCH v1 6/8] hw/sd/aspeed_sdhci: Introduce Capabilities Register 2 for SD slot 0 and 1 Jamin Lin via
2024-11-02 15:02 ` [SPAM] " Cédric Le Goater
2024-11-04 10:28 ` Philippe Mathieu-Daudé [this message]
2024-10-29 9:17 ` [PATCH v1 7/8] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and AST2500 EVBs Jamin Lin via
2024-10-30 0:20 ` Andrew Jeffery
2024-10-30 2:31 ` Jamin Lin
2024-10-29 9:17 ` [PATCH v1 8/8] aspeed: Support create flash devices via command line for AST1030 Jamin Lin via
2024-11-02 15:02 ` [SPAM] " Cédric Le Goater
2024-11-02 15:03 ` [SPAM] [PATCH v1 0/8] Support RTC for AST2700 Cédric Le Goater
2024-11-04 1:16 ` Jamin Lin
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