From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1JU63d-0006QG-1D for qemu-devel@nongnu.org; Tue, 26 Feb 2008 15:05:45 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1JU63X-0006LI-3b for qemu-devel@nongnu.org; Tue, 26 Feb 2008 15:05:42 -0500 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1JU63W-0006L3-CN for qemu-devel@nongnu.org; Tue, 26 Feb 2008 15:05:38 -0500 Received: from mx1.redhat.com ([66.187.233.31]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1JU63V-0001Gm-M8 for qemu-devel@nongnu.org; Tue, 26 Feb 2008 15:05:38 -0500 From: Glauber Costa Date: Tue, 26 Feb 2008 16:56:41 -0300 Message-Id: <1204055805-32349-12-git-send-email-gcosta@redhat.com> In-Reply-To: <1204055805-32349-11-git-send-email-gcosta@redhat.com> References: <1204055805-32349-1-git-send-email-gcosta@redhat.com> <1204055805-32349-2-git-send-email-gcosta@redhat.com> <1204055805-32349-3-git-send-email-gcosta@redhat.com> <1204055805-32349-4-git-send-email-gcosta@redhat.com> <1204055805-32349-5-git-send-email-gcosta@redhat.com> <1204055805-32349-6-git-send-email-gcosta@redhat.com> <1204055805-32349-7-git-send-email-gcosta@redhat.com> <1204055805-32349-8-git-send-email-gcosta@redhat.com> <1204055805-32349-9-git-send-email-gcosta@redhat.com> <1204055805-32349-10-git-send-email-gcosta@redhat.com> <1204055805-32349-11-git-send-email-gcosta@redhat.com> Subject: [Qemu-devel] [PATCH 11/15] manipulate the gpe bits and send sci up the os. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: kvm-devel@lists.sourceforge.net Cc: marcelo@kvack.org, glommer@gmail.com, qemu-devel@nongnu.org, Glauber Costa , chrisw@sous-sol.org Signed-off-by: Glauber Costa --- qemu/hw/acpi.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 42 insertions(+), 0 deletions(-) diff --git a/qemu/hw/acpi.c b/qemu/hw/acpi.c index 7340f15..5a6d1a8 100644 --- a/qemu/hw/acpi.c +++ b/qemu/hw/acpi.c @@ -534,10 +534,13 @@ void qemu_system_powerdown(void) } #endif #define GPE_BASE 0xafe0 +#define PROC_BASE 0xaf00 struct gpe_regs { uint16_t sts; /* status */ uint16_t en; /* enabled */ + uint8_t up; + uint8_t down; }; static struct gpe_regs gpe; @@ -547,6 +550,13 @@ static uint32_t gpe_readb(void *opaque, uint32_t val = 0; struct gpe_regs *g = opaque; switch (addr) { + case PROC_BASE: + val = g->up; + break; + case PROC_BASE + 1: + val = g->down; + break; + case GPE_BASE: val = g->sts & 0xFF; break; @@ -573,6 +583,13 @@ static void gpe_writeb(void *opaque, uin { struct gpe_regs *g = opaque; switch (addr) { + case PROC_BASE: + g->up = val; + break; + case PROC_BASE + 1: + g->down = val; + break; + case GPE_BASE: g->sts = (g->sts & ~0xFFFF) | (val & 0xFFFF); break; @@ -601,9 +618,34 @@ void qemu_system_hot_add_init(char *cpu_ register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, &gpe); register_ioport_read(GPE_BASE, 4, 1, gpe_readb, &gpe); + register_ioport_write(PROC_BASE, 4, 1, gpe_writeb, &gpe); + register_ioport_read(PROC_BASE, 4, 1, gpe_readb, &gpe); + model = cpu_model; } +static void enable_processor(struct gpe_regs *g, int cpu) +{ + g->sts |= 1; + g->en |= 1; + g->up |= (1 << cpu); +} + +static void disable_processor(struct gpe_regs *g, int cpu) +{ + g->sts |= 1; + g->en |= 1; + g->down |= (1 << cpu); +} + void qemu_system_cpu_hot_add(int cpu, int state) { + qemu_set_irq(pm_state->irq, 1); + gpe.up = 0; + gpe.down = 0; + if (state) + enable_processor(&gpe, cpu); + else + disable_processor(&gpe, cpu); + qemu_set_irq(pm_state->irq, 0); } -- 1.4.2