From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K0a4b-0006GN-BP for qemu-devel@nongnu.org; Mon, 26 May 2008 06:37:02 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K0a4Y-0006Df-Fo for qemu-devel@nongnu.org; Mon, 26 May 2008 06:36:58 -0400 Received: from [199.232.76.173] (port=49687 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K0a4X-0006DG-Lw for qemu-devel@nongnu.org; Mon, 26 May 2008 06:36:57 -0400 Received: from il.qumranet.com ([212.179.150.194]:44071) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1K0a4W-0003UW-R8 for qemu-devel@nongnu.org; Mon, 26 May 2008 06:36:57 -0400 From: Amit Shah Date: Mon, 26 May 2008 13:36:41 +0300 Message-Id: <1211798213-4187-5-git-send-email-amit.shah@qumranet.com> In-Reply-To: <1211798213-4187-4-git-send-email-amit.shah@qumranet.com> References: <1211798213-4187-1-git-send-email-amit.shah@qumranet.com> <1211798213-4187-2-git-send-email-amit.shah@qumranet.com> <1211798213-4187-3-git-send-email-amit.shah@qumranet.com> <1211798213-4187-4-git-send-email-amit.shah@qumranet.com> Subject: [Qemu-devel] [PATCH 2/2] QEMU: Mask writes to RO bits in the command reg of PCI config space Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Amit Shah , kvm@vger.kernel.org The Command register in the PCI config space has some read-only bits. Any writes to those bits should be masked out. Signed-off-by: Amit Shah --- qemu/hw/pci.c | 3 +++ qemu/hw/pci.h | 5 +++++ 2 files changed, 8 insertions(+), 0 deletions(-) diff --git a/qemu/hw/pci.c b/qemu/hw/pci.c index 6916f4a..97dc54d 100644 --- a/qemu/hw/pci.c +++ b/qemu/hw/pci.c @@ -446,6 +446,9 @@ void pci_default_write_config(PCIDevice *d, if (can_write) { /* Mask out writes to reserved bits in registers */ switch (addr) { + case 0x05: + val &= ~PCI_COMMAND_RESERVED_MASK_HI; + break; case 0x06: val &= ~PCI_STATUS_RESERVED_MASK_LO; break; diff --git a/qemu/hw/pci.h b/qemu/hw/pci.h index a0cbdd5..f32b591 100644 --- a/qemu/hw/pci.h +++ b/qemu/hw/pci.h @@ -61,6 +61,11 @@ typedef struct PCIIORegion { #define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8) +/* Bits in the PCI Command Register (PCI 2.3 spec) */ +#define PCI_COMMAND_RESERVED 0xf800 + +#define PCI_COMMAND_RESERVED_MASK_HI (PCI_COMMAND_RESERVED >> 8) + struct PCIDevice { /* PCI config space */ uint8_t config[256]; -- 1.5.5.1