From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1K10x2-0002n6-OE for qemu-devel@nongnu.org; Tue, 27 May 2008 11:19:00 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1K10x1-0002mK-NQ for qemu-devel@nongnu.org; Tue, 27 May 2008 11:18:59 -0400 Received: from [199.232.76.173] (port=40938 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1K10x0-0002mD-Vn for qemu-devel@nongnu.org; Tue, 27 May 2008 11:18:59 -0400 Received: from mx1.redhat.com ([66.187.233.31]:48021) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1K10x1-0006gG-1h for qemu-devel@nongnu.org; Tue, 27 May 2008 11:18:59 -0400 From: Glauber Costa Date: Tue, 27 May 2008 12:18:20 -0300 Message-Id: <1211901505-30519-2-git-send-email-gcosta@redhat.com> In-Reply-To: <1211901505-30519-1-git-send-email-gcosta@redhat.com> References: <1211901505-30519-1-git-send-email-gcosta@redhat.com> Subject: [Qemu-devel] [PATCH 1/6] simplify cpu_exec Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kvm@vger.kernel.org This is a first attempt to simplify cpu_exec(): it has simply too many ifdefs, which is not a very good practice at all. Following some work I've already posted in the past, I'm moving the target-b ifdefs to target-xxx/helper.c, encapsuled into relevant functions. Signed-off-by: Glauber Costa --- cpu-exec.c | 54 +----------------------------------------------- exec-all.h | 4 +++ target-alpha/helper.c | 3 ++ target-arm/helper.c | 4 +++ target-cris/helper.c | 3 ++ target-i386/helper.c | 14 ++++++++++++ target-m68k/helper.c | 16 ++++++++++++++ target-mips/helper.c | 3 ++ target-ppc/helper.c | 3 ++ target-sh4/helper.c | 3 ++ target-sparc/helper.c | 17 +++++++++++++++ 11 files changed, 72 insertions(+), 52 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index 65af9a6..a829b7b 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -247,11 +247,6 @@ int cpu_exec(CPUState *env1) { #define DECLARE_HOST_REGS 1 #include "hostregs_helper.h" -#if defined(TARGET_SPARC) -#if defined(reg_REGWPTR) - uint32_t *saved_regwptr; -#endif -#endif int ret, interrupt_request; TranslationBlock *tb; uint8_t *tc_ptr; @@ -267,30 +262,8 @@ int cpu_exec(CPUState *env1) env = env1; env_to_regs(); -#if defined(TARGET_I386) - /* put eflags in CPU temporary format */ - CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); - DF = 1 - (2 * ((env->eflags >> 10) & 1)); - CC_OP = CC_OP_EFLAGS; - env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); -#elif defined(TARGET_SPARC) -#if defined(reg_REGWPTR) - saved_regwptr = REGWPTR; -#endif -#elif defined(TARGET_M68K) - env->cc_op = CC_OP_FLAGS; - env->cc_dest = env->sr & 0xf; - env->cc_x = (env->sr >> 4) & 1; -#elif defined(TARGET_ALPHA) -#elif defined(TARGET_ARM) -#elif defined(TARGET_PPC) -#elif defined(TARGET_MIPS) -#elif defined(TARGET_SH4) -#elif defined(TARGET_CRIS) + cpu_load_flags(env); /* XXXXX */ -#else -#error unsupported target CPU -#endif env->exception_index = -1; /* prepare setjmp context for exception handling */ @@ -640,30 +613,7 @@ int cpu_exec(CPUState *env1) } } /* for(;;) */ - -#if defined(TARGET_I386) - /* restore flags in standard format */ - env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); -#elif defined(TARGET_ARM) - /* XXX: Save/restore host fpu exception state?. */ -#elif defined(TARGET_SPARC) -#if defined(reg_REGWPTR) - REGWPTR = saved_regwptr; -#endif -#elif defined(TARGET_PPC) -#elif defined(TARGET_M68K) - cpu_m68k_flush_flags(env, env->cc_op); - env->cc_op = CC_OP_FLAGS; - env->sr = (env->sr & 0xffe0) - | env->cc_dest | (env->cc_x << 4); -#elif defined(TARGET_MIPS) -#elif defined(TARGET_SH4) -#elif defined(TARGET_ALPHA) -#elif defined(TARGET_CRIS) - /* XXXXX */ -#else -#error unsupported target CPU -#endif + cpu_put_flags(env); /* restore global registers */ #include "hostregs_helper.h" diff --git a/exec-all.h b/exec-all.h index 51b27b5..fd2164f 100644 --- a/exec-all.h +++ b/exec-all.h @@ -82,6 +82,10 @@ int cpu_restore_state_copy(struct TranslationBlock *tb, void *puc); void cpu_resume_from_signal(CPUState *env1, void *puc); void cpu_exec_init(CPUState *env); + +void cpu_load_flags(CPUState *env); +void cpu_put_flags(CPUState *env); + int page_unprotect(target_ulong address, unsigned long pc, void *puc); void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, int is_cpu_write_access); diff --git a/target-alpha/helper.c b/target-alpha/helper.c index fd39f5f..73d565f 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -452,3 +452,6 @@ void cpu_dump_EA (target_ulong EA) f = stdout; fprintf(f, "Memory access at address " TARGET_FMT_lx "\n", EA); } + +void cpu_load_flags(CPUState *env) {} +void cpu_put_flags(CPUState *env) {} diff --git a/target-arm/helper.c b/target-arm/helper.c index 8e85435..496f326 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2522,3 +2522,7 @@ uint32_t HELPER(rsqrte_u32)(uint32_t a, CPUState *env) tmp = float32_scalbn(tmp, 31, s); return float32_to_int32(tmp, s); } + +void cpu_load_flags(CPUState *env) { } +/* XXX: Save/restore host fpu exception state?. */ +void cpu_put_flags(CPUState *env) { } diff --git a/target-cris/helper.c b/target-cris/helper.c index 5548b76..1e216aa 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -183,3 +183,6 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) return phy; } #endif + +void cpu_load_flags(CPUState *env) {} +void cpu_put_flags(CPUState *env) {} diff --git a/target-i386/helper.c b/target-i386/helper.c index 5322491..1d88a9e 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -4668,6 +4668,20 @@ void helper_clgi(void) { env->hflags &= ~HF_GIF_MASK; } +void cpu_load_flags(CPUState *env) +{ + /* put eflags in CPU temporary format */ + CC_SRC = env->eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); + DF = 1 - (2 * ((env->eflags >> 10) & 1)); + CC_OP = CC_OP_EFLAGS; + env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); +} + +void cpu_put_flags(CPUState *env) +{ + /* restore flags in standard format */ + env->eflags = env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); +} #if defined(CONFIG_USER_ONLY) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 848c589..73e93bc 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -339,6 +339,21 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) return addr; } +void cpu_load_flags(CPUState *env) +{ + env->cc_op = CC_OP_FLAGS; + env->cc_dest = env->sr & 0xf; + env->cc_x = (env->sr >> 4) & 1; +} + +void cpu_put_flags(CPUState *env) +{ + cpu_m68k_flush_flags(env, env->cc_op); + env->cc_op = CC_OP_FLAGS; + env->sr = (env->sr & 0xffe0) + | env->cc_dest | (env->cc_x << 4); +} + #if defined(CONFIG_USER_ONLY) int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, @@ -376,3 +391,4 @@ void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector) } #endif + diff --git a/target-mips/helper.c b/target-mips/helper.c index b962295..90e6dbe 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -636,3 +636,6 @@ void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra) } } } + +void cpu_put_flags(CPUState *env) { } +void cpu_load_flags(CPUState *env) { } diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 2a52dc6..300532f 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -2988,3 +2988,6 @@ void cpu_ppc_close (CPUPPCState *env) /* Should also remove all opcode tables... */ qemu_free(env); } + +void cpu_load_flags(CPUState *env) { } +void cpu_put_flags(CPUState *env) { } diff --git a/target-sh4/helper.c b/target-sh4/helper.c index 917f02f..ebc16ac 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -534,3 +534,6 @@ void cpu_load_tlb(CPUState * env) } #endif + +void cpu_load_flags(CPUState *env) {} +void cpu_put_flags(CPUState *env) {} diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 1bc2fed..76c68fa 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1316,6 +1316,23 @@ void cpu_dump_state(CPUState *env, FILE *f, cpu_fprintf(f, "fsr: 0x%08x\n", GET_FSR32(env)); } +#if defined(reg_REGWPTR) +static uint32_t *saved_regwptr; +#endif + +void cpu_load_flags(CPUState *env) +{ +#if defined(reg_REGWPTR) + saved_regwptr = REGWPTR; +#endif +} + +void cpu_put_flags(CPUState *env) +{ +#if defined(reg_REGWPTR) + REGWPTR = saved_regwptr; +#endif +} #ifdef TARGET_SPARC64 #if !defined(CONFIG_USER_ONLY) #include "qemu-common.h" -- 1.5.4.5