From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KLOrT-0004VF-KK for qemu-devel@nongnu.org; Tue, 22 Jul 2008 16:53:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KLOrS-0004Um-1Q for qemu-devel@nongnu.org; Tue, 22 Jul 2008 16:53:31 -0400 Received: from [199.232.76.173] (port=45842 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KLOrR-0004Uj-Th for qemu-devel@nongnu.org; Tue, 22 Jul 2008 16:53:29 -0400 Received: from e1.ny.us.ibm.com ([32.97.182.141]:36514) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1KLOrR-0000Ca-Hh for qemu-devel@nongnu.org; Tue, 22 Jul 2008 16:53:29 -0400 Received: from d01relay04.pok.ibm.com (d01relay04.pok.ibm.com [9.56.227.236]) by e1.ny.us.ibm.com (8.13.8/8.13.8) with ESMTP id m6MKrSca023068 for ; Tue, 22 Jul 2008 16:53:28 -0400 Received: from d01av04.pok.ibm.com (d01av04.pok.ibm.com [9.56.224.64]) by d01relay04.pok.ibm.com (8.13.8/8.13.8/NCO v9.0) with ESMTP id m6MKqCeF224106 for ; Tue, 22 Jul 2008 16:52:12 -0400 Received: from d01av04.pok.ibm.com (loopback [127.0.0.1]) by d01av04.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m6MKqCGp001616 for ; Tue, 22 Jul 2008 16:52:12 -0400 From: Anthony Liguori Date: Tue, 22 Jul 2008 15:51:42 -0500 Message-Id: <1216759903-21779-2-git-send-email-aliguori@us.ibm.com> In-Reply-To: <1216759903-21779-1-git-send-email-aliguori@us.ibm.com> References: <1216759903-21779-1-git-send-email-aliguori@us.ibm.com> Subject: [Qemu-devel] [PATCH 2/3] Fix task register type after reset Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Anthony Liguori From: Avi Kivity kvm: qemu: fix task register type after reset Breaks reboots. Signed-off-by: Avi Kivity Signed-off-by: Anthony Liguori diff --git a/target-i386/helper.c b/target-i386/helper.c index 852f093..7962d6b 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -403,7 +403,7 @@ void cpu_reset(CPUX86State *env) env->ldt.limit = 0xffff; env->ldt.flags = DESC_P_MASK | (2 << DESC_TYPE_SHIFT); env->tr.limit = 0xffff; - env->tr.flags = DESC_P_MASK | (11 < DESC_TYPE_SHIFT); + env->tr.flags = DESC_P_MASK | (11 << DESC_TYPE_SHIFT); cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff, DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK | DESC_R_MASK);