From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KdO8c-0000my-Fq for qemu-devel@nongnu.org; Wed, 10 Sep 2008 07:45:34 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KdO8Z-0000hF-Sj for qemu-devel@nongnu.org; Wed, 10 Sep 2008 07:45:32 -0400 Received: from [199.232.76.173] (port=36314 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KdO8Y-0000fk-Lp for qemu-devel@nongnu.org; Wed, 10 Sep 2008 07:45:30 -0400 Received: from mx1.redhat.com ([66.187.233.31]:57341) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KdO8Y-0003z7-F8 for qemu-devel@nongnu.org; Wed, 10 Sep 2008 07:45:30 -0400 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id m8ABjT3B001184 for ; Wed, 10 Sep 2008 07:45:29 -0400 From: Gerd Hoffmann Date: Wed, 10 Sep 2008 13:45:23 +0200 Message-Id: <1221047125-12949-2-git-send-email-kraxel@redhat.com> In-Reply-To: <1221047125-12949-1-git-send-email-kraxel@redhat.com> References: <1221047125-12949-1-git-send-email-kraxel@redhat.com> Subject: [Qemu-devel] [PATCH 2/4] pci: add config space struct (from qemu-xen). Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Gerd Hoffmann Signed-off-by: Gerd Hoffmann --- hw/pci.h | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+), 0 deletions(-) diff --git a/hw/pci.h b/hw/pci.h index e870987..f518e5e 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -6,6 +6,32 @@ /* PCI bus */ +struct pci_config_header { + le16 vendor_id; + le16 device_id; + le16 command; + le16 status; + uint8_t revision; + uint8_t api; + uint8_t subclass; + uint8_t class; + uint8_t cache_line_size; /* Units of 32 bit words */ + uint8_t latency_timer; /* In units of bus cycles */ + uint8_t header_type; /* Should be 0 */ + uint8_t bist; /* Built in self test */ + le32 base_address_regs[6]; + le32 reserved1; + le16 sub_vendor_id; + le16 sub_device_id; + le32 rom_addr; + le32 reserved3; + le32 reserved4; + uint8_t interrupt_line; + uint8_t interrupt_pin; + uint8_t min_gnt; + uint8_t max_lat; +}; + extern target_phys_addr_t pci_mem_base; typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, -- 1.5.5.1