From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KqCWR-0001WV-S1 for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:08 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KqCWP-0001Uf-50 for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:06 -0400 Received: from [199.232.76.173] (port=36799 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KqCWO-0001UR-UP for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:04 -0400 Received: from mx2.redhat.com ([66.187.237.31]:49507) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KqCWO-0001MT-7Y for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:04 -0400 From: Glauber Costa Date: Wed, 15 Oct 2008 19:55:11 -0200 Message-Id: <1224107718-19128-15-git-send-email-glommer@redhat.com> In-Reply-To: <1224107718-19128-1-git-send-email-glommer@redhat.com> References: <1224107718-19128-1-git-send-email-glommer@redhat.com> Subject: [Qemu-devel] [PATCH 14/21] add tsc field to cpu definition Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com, jan.kiszka@siemens.com, jes@sgi.com, avi@qumranet.com, Glauber Costa , dmitry.baryshkov@siemens.com From: Glauber Costa kvm will use it, but it is pretty general Signed-off-by: Glauber Costa --- target-i386/cpu.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 3c11e0f..ab04500 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -580,6 +580,7 @@ typedef struct CPUX86State { target_ulong kernelgsbase; #endif + uint64_t tsc; uint64_t pat; /* exception/interrupt handling */ -- 1.5.5.1