From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KqCWg-0001e6-6C for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KqCWe-0001cY-2g for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:21 -0400 Received: from [199.232.76.173] (port=36810 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KqCWd-0001cP-EY for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:19 -0400 Received: from mx2.redhat.com ([66.187.237.31]:49565) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KqCWc-0001PF-Lc for qemu-devel@nongnu.org; Wed, 15 Oct 2008 15:59:19 -0400 From: Glauber Costa Date: Wed, 15 Oct 2008 19:55:18 -0200 Message-Id: <1224107718-19128-22-git-send-email-glommer@redhat.com> In-Reply-To: <1224107718-19128-1-git-send-email-glommer@redhat.com> References: <1224107718-19128-1-git-send-email-glommer@redhat.com> Subject: [Qemu-devel] [PATCH 21/21] provide an opaque for accelerator in cpu state Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: jan.kiszka@siemens.com, aliguori@us.ibm.com, jes@sgi.com, avi@qumranet.com, dmitry.baryshkov@siemens.com Convert kqemu to use it. We also provide a small macro to easy the access to the accelerator fields. Signed-off-by: Glauber Costa CC: Jes Sorensen --- accel.h | 2 ++ cpu-defs.h | 1 + exec-all.h | 3 +++ kqemu.c | 19 ++++++++++++------- kqemu.h | 6 ++++++ target-i386/cpu.h | 4 ---- target-i386/op_helper.c | 2 +- 7 files changed, 25 insertions(+), 12 deletions(-) diff --git a/accel.h b/accel.h index 1d5986a..17a868c 100644 --- a/accel.h +++ b/accel.h @@ -34,6 +34,8 @@ extern QEMUAccel noaccel; extern QEMUAccel kqemu_accel; #endif +#define accel_opaque_field(env, type, field) ((type *)env->accel_opaque)->field + extern QEMUCont *head; void *qemu_mallocz(size_t size); extern CPUState *noaccel_get_env(void); diff --git a/cpu-defs.h b/cpu-defs.h index 5dcac74..989e221 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -198,6 +198,7 @@ typedef struct icount_decr_u16 { int running; /* Nonzero if cpu is currently running(usermode). */ \ /* user data */ \ void *opaque; \ + void *accel_opaque; \ \ const char *cpu_model_str; diff --git a/exec-all.h b/exec-all.h index 6230a37..7f4a947 100644 --- a/exec-all.h +++ b/exec-all.h @@ -375,6 +375,9 @@ int kqemu_kernel_enabled(CPUState *env); extern uint32_t kqemu_comm_base; +#include "accel.h" +#include + static inline int kqemu_is_ok(CPUState *env) { return(kqemu_is_enabled(env) && diff --git a/kqemu.c b/kqemu.c index 8b4561c..489c674 100644 --- a/kqemu.c +++ b/kqemu.c @@ -62,6 +62,8 @@ #define KQEMU_DEVICE "/dev/kqemu" #endif +struct kqemu_cpu_opaque kqemu_opaque; + static void qpi_init(void); #ifdef _WIN32 @@ -247,7 +249,9 @@ int kqemu_start(void) void kqemu_init_env(CPUState *env) { kqemu_update_cpuid(env); - env->kqemu_enabled = kqemu_allowed; + /* SMP currently not supported, so this is okay */ + kqemu_opaque.kqemu_enabled = kqemu_allowed; + env->accel_opaque = &kqemu_opaque; } /* FIXME: Should not be needed, since ideally, QEMUAccel would avoid all kqemu tests @@ -259,7 +263,7 @@ int kqemu_is_enabled(CPUState *env) return 0; } - return env->kqemu_enabled; + return kqemu_opaque_field(env, kqemu_enabled); } @@ -268,7 +272,8 @@ int kqemu_kernel_enabled(CPUState *env) if (strcasecmp(current_accel->name, "kqemu")) { return 0; } - return env->kqemu_enabled == 2; + + return kqemu_opaque_field(env, kqemu_enabled) == 2; } void kqemu_flush_page(CPUState *env, target_ulong addr) @@ -298,7 +303,7 @@ int kqemu_info(CPUState *env, char *buf) { int val, len; val = 0; - val = env->kqemu_enabled; + val = kqemu_opaque_field(env, kqemu_enabled); len = sprintf(buf, "kqemu support: "); buf += len; @@ -457,14 +462,14 @@ void kqemu_set_phys_mem(uint64_t start_addr, ram_addr_t size, void kqemu_trace_io(CPUState *env) { if (env) - env->last_io_time = cpu_get_time_fast(); + kqemu_opaque_field(env, last_io_time) = cpu_get_time_fast(); } int kqemu_break_loop(CPUState *env) { #define MIN_CYCLE_BEFORE_SWITCH (100 * 1000) if (kqemu_is_ok(env) && - (cpu_get_time_fast() - env->last_io_time) >= MIN_CYCLE_BEFORE_SWITCH) { + (cpu_get_time_fast() - kqemu_opaque_field(env, last_io_time)) >= MIN_CYCLE_BEFORE_SWITCH) { return 1; } return 0; @@ -875,7 +880,7 @@ int kqemu_cpu_exec(CPUState *env) cpl = (env->hflags & HF_CPL_MASK); kenv->cpl = cpl; kenv->nb_pages_to_flush = nb_pages_to_flush; - kenv->user_only = (env->kqemu_enabled == 1); + kenv->user_only = (kqemu_opaque_field(env, kqemu_enabled) == 1); kenv->nb_ram_pages_to_update = nb_ram_pages_to_update; nb_ram_pages_to_update = 0; kenv->nb_modified_ram_pages = nb_modified_ram_pages; diff --git a/kqemu.h b/kqemu.h index 1c7e024..e121494 100644 --- a/kqemu.h +++ b/kqemu.h @@ -38,6 +38,12 @@ extern int64_t kqemu_ret_int_count; extern int64_t kqemu_ret_excp_count; extern int64_t kqemu_ret_intr_count; +struct kqemu_cpu_opaque { + int kqemu_enabled; + int last_io_time; +}; +#define kqemu_opaque_field(env, field) accel_opaque_field(env, struct kqemu_cpu_opaque, field) + struct kqemu_segment_cache { uint16_t selector; uint16_t padding1; diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 47c9fa6..3772f54 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -610,10 +610,6 @@ typedef struct CPUX86State { uint32_t cpuid_ext3_features; uint32_t cpuid_apic_id; -#ifdef USE_KQEMU - int kqemu_enabled; - int last_io_time; -#endif /* in order to simplify APIC support, we leave this pointer to the user */ struct APICState *apic_state; diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index e9a6942..65d6b36 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -3261,7 +3261,7 @@ void helper_rdmsr(void) #endif #ifdef USE_KQEMU case MSR_QPI_COMMBASE: - if (env->kqemu_enabled) { + if (kqemu_opaque_field(env, kqemu_enabled)) { val = kqemu_comm_base; } else { val = 0; -- 1.5.5.1