From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KszE1-0007Jw-1w for qemu-devel@nongnu.org; Thu, 23 Oct 2008 08:23:37 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KszDx-0007H0-Cf for qemu-devel@nongnu.org; Thu, 23 Oct 2008 08:23:35 -0400 Received: from [199.232.76.173] (port=51714 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KszDw-0007Gv-VF for qemu-devel@nongnu.org; Thu, 23 Oct 2008 08:23:33 -0400 Received: from mx2.redhat.com ([66.187.237.31]:54724) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KszDu-0006La-Ll for qemu-devel@nongnu.org; Thu, 23 Oct 2008 08:23:33 -0400 From: Glauber Costa Date: Thu, 23 Oct 2008 12:19:11 -0200 Message-Id: <1224771556-11146-28-git-send-email-glommer@redhat.com> In-Reply-To: <1224771556-11146-1-git-send-email-glommer@redhat.com> References: <1224771556-11146-1-git-send-email-glommer@redhat.com> Subject: [Qemu-devel] [PATCH 27/32] arch-specific hooks for accelerator Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: jan.kiszka@siemens.com, aliguori@us.ibm.com, jes@sgi.com, avi@qumranet.com, dmitry.baryshkov@siemens.com This patch provides an arch field in QEMUAccel. It will be used initially for x86, to replace kqemu code in op_helper.c We start with get_msr and set_msr functions, that allow accelerators to handle non-default msrs. Signed-off-by: Glauber Costa --- accel.h | 1 + exec-all.h | 2 -- kqemu.c | 26 +++++++++++++++++++++++++- target-i386/accel86.h | 28 ++++++++++++++++++++++++++++ target-i386/op_helper.c | 14 +++----------- 5 files changed, 57 insertions(+), 14 deletions(-) create mode 100644 target-i386/accel86.h diff --git a/accel.h b/accel.h index 1741f06..00a495c 100644 --- a/accel.h +++ b/accel.h @@ -23,6 +23,7 @@ typedef struct QEMUAccel { void (*trace_io)(CPUState *env); int (*break_loop)(CPUState *env); int (*cpu_exec)(CPUState *env); + void *arch; /* arch-specific accel functions */ } QEMUAccel; typedef struct QEMUCont { diff --git a/exec-all.h b/exec-all.h index 8228746..1e9aa5a 100644 --- a/exec-all.h +++ b/exec-all.h @@ -369,8 +369,6 @@ void kqemu_set_phys_mem(uint64_t start_addr, ram_addr_t size, ram_addr_t phys_offset); void kqemu_record_dump(void); -extern uint32_t kqemu_comm_base; - static inline int kqemu_is_ok(CPUState *env) { return(env->kqemu_enabled && diff --git a/kqemu.c b/kqemu.c index 310a1af..cab6354 100644 --- a/kqemu.c +++ b/kqemu.c @@ -55,7 +55,7 @@ static int kqemu_state; #include #include #include "kqemu.h" -#include "accel.h" +#include "accel86.h" #ifdef CONFIG_PROFILER #include "qemu-timer.h" /* for ticks_per_sec */ @@ -1169,6 +1169,28 @@ static CPUState *kqemu_get_env(void) return &kenv->env; } +static int kqemu_get_msr(int msr, uint64_t *val) +{ + int ret = -1; + switch (msr) { + case MSR_QPI_COMMBASE: + val = kqemu_comm_base; + ret = 0; + break; + } + return ret; +} + +static int kqemu_set_msr(int msr, target_ulong val) +{ + return -1; +} + +QEMUAccel86 kqemu_accel86 = { + .get_msr = kqemu_get_msr, + .set_msr = kqemu_set_msr, +}; + QEMUAccel kqemu_accel = { .name = "KQEMU", .cpu_interrupt = kqemu_cpu_interrupt, @@ -1191,6 +1213,7 @@ QEMUAccel kqemu_accel = { .trace_io = kqemu_trace_io, .break_loop = kqemu_break_loop, .cpu_exec = kqemu_cpu_exec, + .arch = &kqemu_accel86, }; QEMUAccel kqemu_kernel_accel = { @@ -1212,6 +1235,7 @@ QEMUAccel kqemu_kernel_accel = { .trace_io = kqemu_trace_io, .break_loop = kqemu_break_loop, .cpu_exec = kqemu_cpu_exec, + .arch = &kqemu_accel86, }; #endif diff --git a/target-i386/accel86.h b/target-i386/accel86.h new file mode 100644 index 0000000..142d63e --- /dev/null +++ b/target-i386/accel86.h @@ -0,0 +1,28 @@ +#ifndef _ACCEL_86_H_ +#define _ACCEL_86_H_ + +#include "accel.h" + +typedef struct QEMUAccel86 { + int (*get_msr)(int msr, uint64_t *value); + int (*set_msr)(int msr, uint64_t value); +} QEMUAccel86; + +#define accel86_call_func ((QEMUAccel86 *)(current_accel->arch)) + +static inline int accel_get_msr(int msr, uint64_t *value) +{ + if (!current_accel->arch) + return -1; + return accel86_call_func->get_msr(msr, value); +} + +static inline int accel_set_msr(int msr, uint64_t value) +{ + if (!current_accel->arch) + return -1; + return accel86_call_func->set_msr(msr, value); +} + +#endif + diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index ebb5824..fe8ddf8 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -20,6 +20,7 @@ #define CPU_NO_GLOBAL_REGS #include "exec.h" #include "host-utils.h" +#include "accel86.h" //#define DEBUG_PCALL @@ -3262,18 +3263,9 @@ void helper_rdmsr(void) val = env->kernelgsbase; break; #endif -#ifdef USE_KQEMU - case MSR_QPI_COMMBASE: - if (env->kqemu_enabled) { - val = kqemu_comm_base; - } else { - val = 0; - } - break; -#endif default: - /* XXX: exception ? */ - val = 0; + if (accel_get_msr((uint32_t)ECX, &val) < 0) + val = 0; break; } EAX = (uint32_t)(val); -- 1.5.5.1