From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1L7EHM-0003DG-JB for qemu-devel@nongnu.org; Mon, 01 Dec 2008 14:17:56 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1L7EHK-0003Cz-Ie for qemu-devel@nongnu.org; Mon, 01 Dec 2008 14:17:55 -0500 Received: from [199.232.76.173] (port=60341 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1L7EHK-0003Cw-CK for qemu-devel@nongnu.org; Mon, 01 Dec 2008 14:17:54 -0500 Received: from e5.ny.us.ibm.com ([32.97.182.145]:59338) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1L7EHK-0003jE-1I for qemu-devel@nongnu.org; Mon, 01 Dec 2008 14:17:54 -0500 Received: from d01relay04.pok.ibm.com (d01relay04.pok.ibm.com [9.56.227.236]) by e5.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id mB1JHRiF020273 for ; Mon, 1 Dec 2008 14:17:27 -0500 Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by d01relay04.pok.ibm.com (8.13.8/8.13.8/NCO v9.1) with ESMTP id mB1JHnTV189712 for ; Mon, 1 Dec 2008 14:17:49 -0500 Received: from d01av01.pok.ibm.com (loopback [127.0.0.1]) by d01av01.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id mB1JHnxq016830 for ; Mon, 1 Dec 2008 14:17:49 -0500 Subject: Re: [Qemu-devel] [PATCH] IBM PowerPC 4xx 32-bit PCI controller emulation From: Hollis Blanchard In-Reply-To: References: <1227727332-17939-1-git-send-email-hollisb@us.ibm.com> Content-Type: text/plain Date: Mon, 01 Dec 2008 13:17:48 -0600 Message-Id: <1228159068.14874.46.camel@localhost.localdomain> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel@nongnu.org Hi Blue, thanks for your comments. On Mon, 2008-12-01 at 20:15 +0200, Blue Swirl wrote: > On 11/26/08, Hollis Blanchard wrote: > > This PCI controller can be found on a number of 4xx SoCs, including the 440EP. > > > > Signed-off-by: Hollis Blanchard > > --- > > This isn't yet used by the ppc405 boards qemu emulates, but it could be if > > someone has a 405 firmware/kernel they're able to test with. > > The device can't be tested unless it's used by some board. I have tested the device using KVM. Since PCI support is a self-contained patch that could be very useful to other qemu users, I posted it first. The problem is that none of the 405 boards emulated by qemu are functional enough for me to run a kernel, so I can't test those. However, Jean-Christophe Plagniol-Villard is planning to test this (though I'm not sure how). If you'd prefer, I can post this patch only after the PowerPC KVM support has been merged. > > +#if 0 > > + printf("### %s: devfn %x irq %d -> %d\n", __func__, > > + pci_dev->devfn, irq_num, slot+1); > > +#endif > > You could introduce a DPRINTF macro, like for example in slavio_intctl.c. Sure. > > + /* Board IRQs 2-5 are connected to UIC IRQs 28-25 */ > > + /* XXX Needs some abstracting for boards other than Bamboo. */ > > + qemu_set_irq(pic[30-irq_num], level); > > +} > > The IRQs should be set up at the board level and then passed to the device. OK, I'll give that a try. > > + /* XXX register_savevm() */ > > And register_reset? I didn't know about that one. Looks easy enough. I will send an updated patch once I've made these changes. -- Hollis Blanchard IBM Linux Technology Center