From: Mans Rullgard <mans@mansr.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 1/2] ARM: fix usad8 and usada8 instructions
Date: Mon, 1 Dec 2008 20:47:35 +0000 [thread overview]
Message-ID: <1228164456-4379-2-git-send-email-mans@mansr.com> (raw)
In-Reply-To: <1228164456-4379-1-git-send-email-mans@mansr.com>
This fixes the destination and accumulator registers for the usad8
and usada8 instructions.
Signed-off-by: Mans Rullgard <mans@mansr.com>
---
target-arm/translate.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index f984de7..424a4a6 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6581,12 +6581,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
tmp2 = load_reg(s, rs);
gen_helper_usad8(tmp, tmp, tmp2);
dead_tmp(tmp2);
- if (rn != 15) {
- tmp2 = load_reg(s, rn);
+ if (rd != 15) {
+ tmp2 = load_reg(s, rd);
tcg_gen_add_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
}
- store_reg(s, rd, tmp);
+ store_reg(s, rn, tmp);
break;
case 0x20: case 0x24: case 0x28: case 0x2c:
/* Bitfield insert/clear. */
--
1.6.0.4
next prev parent reply other threads:[~2008-12-01 20:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-12-01 20:47 [Qemu-devel] [PATCH 0/2] ARMv6 fixes Mans Rullgard
2008-12-01 20:47 ` Mans Rullgard [this message]
2008-12-01 20:47 ` [Qemu-devel] [PATCH 2/2] ARM: fix smmul and smmla instructions Mans Rullgard
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