From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LC2zp-0002dp-Rv for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:15:45 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LC2zp-0002dK-8A for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:15:45 -0500 Received: from [199.232.76.173] (port=40899 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LC2zo-0002dG-Tb for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:15:44 -0500 Received: from mx20.gnu.org ([199.232.41.8]:31134) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LC2zo-0000e0-KL for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:15:44 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LC2zn-0002Ec-Qq for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:15:44 -0500 From: Nathan Froyd Date: Sun, 14 Dec 2008 18:14:52 -0800 Message-Id: <1229307315-16807-20-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> References: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 19/42] target-ppc: add m{f, t}vscr instructions. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- target-ppc/translate.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 41 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 791f76b..92ded89 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -68,6 +68,7 @@ static TCGv cpu_lr; static TCGv cpu_xer; static TCGv cpu_reserve; static TCGv_i32 cpu_fpscr; +static TCGv_i32 cpu_vscr; static TCGv_i32 cpu_access_type; #include "gen-icount.h" @@ -151,6 +152,9 @@ void ppc_translate_init(void) cpu_fpscr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, fpscr), "fpscr"); + cpu_vscr = tcg_global_mem_new_i32(TCG_AREG0, + offsetof(CPUState, vscr), "vscr"); + cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, access_type), "access_type"); @@ -6148,6 +6152,43 @@ GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC) tcg_temp_free(rd); } +static always_inline void gen_vscr_ptr (TCGv_ptr p, int r) +{ +#if defined(WORDS_BIGENDIAN) + tcg_gen_addi_ptr(p, cpu_env, offsetof(CPUPPCState, avr[r].u32[3])); +#else + tcg_gen_addi_ptr(p, cpu_env, offsetof(CPUPPCState, avr[r].u32[0])); +#endif +} + +GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) +{ + TCGv_ptr p; + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + p = tcg_temp_new(); + tcg_gen_movi_i64(cpu_avrh[rD(ctx->opcode)], 0); + tcg_gen_movi_i64(cpu_avrl[rD(ctx->opcode)], 0); + gen_vscr_ptr(p, rD(ctx->opcode)); + tcg_gen_mov_i32(p, cpu_vscr); + tcg_temp_free(p); +} + +GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) +{ + TCGv_ptr p; + if (unlikely(!ctx->altivec_enabled)) { + gen_exception(ctx, POWERPC_EXCP_VPU); + return; + } + p = tcg_temp_new(); + gen_vscr_ptr(p, rB(ctx->opcode)); + tcg_gen_mov_i32(cpu_vscr, p); + tcg_temp_free(p); +} + /* Logical operations */ #define GEN_VX_LOGICAL(name, tcg_op, xo) \ GEN_HANDLER(name, 0x04, (xo >> 1) & 0x1f, (xo >> 6) & 0x1f, 0x00000000, PPC_ALTIVEC) \ -- 1.6.0.5