From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LC307-0002ok-1X for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:16:03 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LC306-0002oB-8V for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:16:02 -0500 Received: from [199.232.76.173] (port=40911 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LC305-0002nv-VL for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:16:02 -0500 Received: from mx20.gnu.org ([199.232.41.8]:31143) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LC305-0000fg-Iy for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:16:01 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LC304-0002FJ-PE for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:16:01 -0500 From: Nathan Froyd Date: Sun, 14 Dec 2008 18:15:15 -0800 Message-Id: <1229307315-16807-43-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> References: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 42/42] target-ppc: add vsumsws, vsum2sws, and vsum4{sbs, shs, ubs} instructions. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- target-ppc/helper.h | 5 ++ target-ppc/op_helper.c | 102 ++++++++++++++++++++++++++++++++++++++++++++++++ target-ppc/translate.c | 5 ++ 3 files changed, 112 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 1dd2cf8..51760a1 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -217,6 +217,11 @@ DEF_HELPER_2(lvewx, void, avr, tl) DEF_HELPER_2(stvebx, void, avr, tl) DEF_HELPER_2(stvehx, void, avr, tl) DEF_HELPER_2(stvewx, void, avr, tl) +DEF_HELPER_3(vsumsws, void, avr, avr, avr) +DEF_HELPER_3(vsum2sws, void, avr, avr, avr) +DEF_HELPER_3(vsum4sbs, void, avr, avr, avr) +DEF_HELPER_3(vsum4shs, void, avr, avr, avr) +DEF_HELPER_3(vsum4ubs, void, avr, avr, avr) DEF_HELPER_1(efscfsi, i32, i32) DEF_HELPER_1(efscfui, i32, i32) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 0c7473c..c9a015f 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -2710,6 +2710,108 @@ void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } +void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int64_t t; + int i, upper; + ppc_avr_t result; + int sat = 0; + +#if defined(WORDS_BIGENDIAN) + upper = N_ELEMS(s32)-1; +#else + upper = 0; +#endif + t = (int64_t)b->s32[upper]; + VECTOR_FOR_I (i, s32) { + t += a->s32[i]; + result.s32[i] = 0; + } + result.s32[upper] = cvtsdsw(t, &sat); + *r = result; + + if (sat) { + env->vscr |= (1 << VSCR_SAT); + } +} + +void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i, j, upper; + ppc_avr_t result; + int sat = 0; + +#if defined(WORDS_BIGENDIAN) + upper = 1; +#else + upper = 0; +#endif + VECTOR_FOR_I (i, u64) { + int64_t t = (int64_t)b->s32[upper+i*2]; + result.u64[i] = 0; + VECTOR_FOR_I (j, u64) { + t += a->s32[2*i+j]; + } + result.s32[upper+i*2] = cvtsdsw(t, &sat); + } + + *r = result; + if (sat) { + env->vscr |= (1 << VSCR_SAT); + } +} + +void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i, j; + int sat = 0; + + VECTOR_FOR_I (i, s32) { + int64_t t = (int64_t)b->s32[i]; + VECTOR_FOR_I (j, s32) { + t += a->s8[4*i+j]; + } + r->s32[i] = cvtsdsw(t, &sat); + } + + if (sat) { + env->vscr |= (1 << VSCR_SAT); + } +} + +void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int sat = 0; + + VECTOR_FOR (s32) { + int64_t t = (int64_t)b->s32[i]; + t += a->s16[2*i] + a->s16[2*i+1]; + r->s32[i] = cvtsdsw(t, &sat); + } + + if (sat) { + env->vscr |= (1 << VSCR_SAT); + } +} + +void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +{ + int i, j; + int sat = 0; + + VECTOR_FOR_I (i, u32) { + uint64_t t = (uint64_t)b->u32[i]; + VECTOR_FOR_I (j, u32) { + t += a->u8[4*i+j]; + } + r->u32[i] = cvtuduw(t, &sat); + } + + if (sat) { + env->vscr |= (1 << VSCR_SAT); + } +} + #if defined(WORDS_BIGENDIAN) #define UPKHI 1 #define UPKLO 0 diff --git a/target-ppc/translate.c b/target-ppc/translate.c index c7342a5..2cdb920 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6349,6 +6349,11 @@ GEN_VXFORM(vpkswus, 334); GEN_VXFORM(vpkshss, 398); GEN_VXFORM(vpkswss, 462); GEN_VXFORM(vpkpx, 782); +GEN_VXFORM(vsum4ubs, 1544); +GEN_VXFORM(vsum4sbs, 1800); +GEN_VXFORM(vsum4shs, 1608); +GEN_VXFORM(vsum2sws, 1672); +GEN_VXFORM(vsumsws, 1928); #define GEN_VXFORM_NOA(name, xo) \ GEN_HANDLER(name, 0x04, (xo >> 1) & 0x1f, (xo >> 6) & 0x1f, 0x001f0000, PPC_ALTIVEC) \ -- 1.6.0.5