From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LC36g-0006C9-UF for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:22:50 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LC36d-00069z-6s for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:22:50 -0500 Received: from [199.232.76.173] (port=47098 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LC36d-00069t-0L for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:22:47 -0500 Received: from mx20.gnu.org ([199.232.41.8]:31280) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LC36c-0001Ai-Lq for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:22:46 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LC36b-0002Qk-HN for qemu-devel@nongnu.org; Sun, 14 Dec 2008 21:22:45 -0500 From: Nathan Froyd Date: Sun, 14 Dec 2008 18:14:37 -0800 Message-Id: <1229307315-16807-5-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> References: <1229307315-16807-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 04/42] target-ppc: add GEN_VXFORM macro for subsequent instructions. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- target-ppc/translate.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 41ae158..51db789 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6134,6 +6134,23 @@ GEN_VX_LOGICAL(vor, tcg_gen_or_i64, 1156); GEN_VX_LOGICAL(vxor, tcg_gen_xor_i64, 1220); GEN_VX_LOGICAL(vnor, tcg_gen_nor_i64, 1284); +#define GEN_VXFORM(name, xo) \ +GEN_HANDLER(name, 0x04, (xo >> 1) & 0x1f, (xo >> 6) & 0x1f, 0x00000000, PPC_ALTIVEC) \ +{ \ + TCGv_ptr ra, rb, rd; \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + ra = gen_avr_ptr(rA(ctx->opcode)); \ + rb = gen_avr_ptr(rB(ctx->opcode)); \ + rd = gen_avr_ptr(rD(ctx->opcode)); \ + gen_helper_##name (rd, ra, rb); \ + tcg_temp_free (ra); \ + tcg_temp_free (rb); \ + tcg_temp_free (rd); \ +} + /*** SPE extension ***/ /* Register moves */ -- 1.6.0.5