From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LCLj8-0003vu-Ao for qemu-devel@nongnu.org; Mon, 15 Dec 2008 17:15:46 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LCLj4-0003so-LT for qemu-devel@nongnu.org; Mon, 15 Dec 2008 17:15:45 -0500 Received: from [199.232.76.173] (port=41291 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LCLj4-0003sY-DR for qemu-devel@nongnu.org; Mon, 15 Dec 2008 17:15:42 -0500 Received: from mx20.gnu.org ([199.232.41.8]:58443) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LCLj4-00013w-Aj for qemu-devel@nongnu.org; Mon, 15 Dec 2008 17:15:42 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LCLj1-0004oX-OK for qemu-devel@nongnu.org; Mon, 15 Dec 2008 17:15:40 -0500 From: Nathan Froyd Date: Mon, 15 Dec 2008 14:15:32 -0800 Message-Id: <1229379335-8782-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH] target-ppc: add Altivec instructions, corrections Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org [Apologies for sending this as a separate, smaller series; I lost the original thread, or else I'd reply to those.] Actual testing against Altivec hardware revealed a few typos and thinkos in my Altivec patch series. This series can be applied at the appropriate places in the original series and should be considered as superseding the corresponding patches. The only thing that does work is m{f,t}vscr; I've verified that instructions that set bits in vscr operate properly, but at least mfvscr doesn't actually update the register with the contents of vscr. I'm at a loss to figure out why. Advice welcome... -Nathan