From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LCgb1-0004se-5l for qemu-devel@nongnu.org; Tue, 16 Dec 2008 15:32:47 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LCgaz-0004rf-4a for qemu-devel@nongnu.org; Tue, 16 Dec 2008 15:32:46 -0500 Received: from [199.232.76.173] (port=56317 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LCgay-0004rc-VI for qemu-devel@nongnu.org; Tue, 16 Dec 2008 15:32:44 -0500 Received: from mx20.gnu.org ([199.232.41.8]:30193) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LCgay-0005RK-Ml for qemu-devel@nongnu.org; Tue, 16 Dec 2008 15:32:44 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LCgax-0003R6-Jd for qemu-devel@nongnu.org; Tue, 16 Dec 2008 15:32:43 -0500 From: Nathan Froyd Date: Tue, 16 Dec 2008 12:32:42 -0800 Message-Id: <1229459562-1637-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH] Fix type of spe_acc. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org ACC is a 64-bit register and needs to be specified as such regardless of the target. Signed-off-by: Nathan Froyd --- target-ppc/cpu.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 5bfa4a0..113bba5 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -609,7 +609,7 @@ struct CPUPPCState { ppc_avr_t avr[32]; uint32_t vscr; /* SPE registers */ - target_ulong spe_acc; + uint64_t spe_acc; float_status spe_status; uint32_t spe_fscr; -- 1.6.0.5