From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LHrah-0003EQ-21 for qemu-devel@nongnu.org; Tue, 30 Dec 2008 22:17:51 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LHrae-0003DZ-Vz for qemu-devel@nongnu.org; Tue, 30 Dec 2008 22:17:50 -0500 Received: from [199.232.76.173] (port=51254 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LHrae-0003DQ-IU for qemu-devel@nongnu.org; Tue, 30 Dec 2008 22:17:48 -0500 Received: from mx20.gnu.org ([199.232.41.8]:31454) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LHrae-0005bU-9q for qemu-devel@nongnu.org; Tue, 30 Dec 2008 22:17:48 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LHrad-0006jt-Ef for qemu-devel@nongnu.org; Tue, 30 Dec 2008 22:17:47 -0500 From: Nathan Froyd Date: Tue, 30 Dec 2008 19:10:04 -0800 Message-Id: <1230693022-18380-23-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1230693022-18380-1-git-send-email-froydnj@codesourcery.com> References: <1230693022-18380-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 22/40] Add GEN_VXFORM_SIMM macro for subsequent instructions. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- target-ppc/translate.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 4516ba6..e590476 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -370,6 +370,8 @@ EXTRACT_HELPER(IMM, 12, 8); EXTRACT_SHELPER(SIMM, 0, 16); /* 16 bits unsigned immediate value */ EXTRACT_HELPER(UIMM, 0, 16); +/* 5 bits signed immediate value */ +EXTRACT_HELPER(SIMM5, 16, 5); /* Bit count */ EXTRACT_HELPER(NB, 11, 5); /* Shift count */ @@ -6321,6 +6323,22 @@ GEN_VXFORM(vrlw, 2, 2); GEN_VXFORM(vsl, 2, 7); GEN_VXFORM(vsr, 2, 11); +#define GEN_VXFORM_SIMM(name, opc2, opc3) \ + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ + { \ + TCGv_ptr rd; \ + TCGv_i32 simm; \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + simm = tcg_const_i32(SIMM5(ctx->opcode)); \ + rd = gen_avr_ptr(rD(ctx->opcode)); \ + gen_helper_##name (rd, simm); \ + tcg_temp_free_i32(simm); \ + tcg_temp_free_ptr(rd); \ + } + #define GEN_VXRFORM1(opname, name, str, opc2, opc3) \ GEN_HANDLER2(name, str, 0x4, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ { \ -- 1.6.0.5