From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LHt8n-0005Xr-6r for qemu-devel@nongnu.org; Tue, 30 Dec 2008 23:57:09 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LHt8m-0005Xd-Tm for qemu-devel@nongnu.org; Tue, 30 Dec 2008 23:57:08 -0500 Received: from [199.232.76.173] (port=60776 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LHt8m-0005Xa-L4 for qemu-devel@nongnu.org; Tue, 30 Dec 2008 23:57:08 -0500 Received: from mx20.gnu.org ([199.232.41.8]:34235) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LHt8m-0006Ia-6r for qemu-devel@nongnu.org; Tue, 30 Dec 2008 23:57:08 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LHt8l-0001N4-Fp for qemu-devel@nongnu.org; Tue, 30 Dec 2008 23:57:07 -0500 From: Nathan Froyd Date: Tue, 30 Dec 2008 19:10:06 -0800 Message-Id: <1230693022-18380-25-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1230693022-18380-1-git-send-email-froydnj@codesourcery.com> References: <1230693022-18380-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 24/40] Add GEN_VXFORM_UIMM macro for subsequent instructions. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- target-ppc/translate.c | 20 ++++++++++++++++++++ 1 files changed, 20 insertions(+), 0 deletions(-) diff --git a/target-ppc/translate.c b/target-ppc/translate.c index d9c1e60..77e93cb 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -372,6 +372,8 @@ EXTRACT_SHELPER(SIMM, 0, 16); EXTRACT_HELPER(UIMM, 0, 16); /* 5 bits signed immediate value */ EXTRACT_HELPER(SIMM5, 16, 5); +/* 5 bits signed immediate value */ +EXTRACT_HELPER(UIMM5, 16, 5); /* Bit count */ EXTRACT_HELPER(NB, 11, 5); /* Shift count */ @@ -6343,6 +6345,24 @@ GEN_VXFORM_SIMM(vspltisb, 6, 12); GEN_VXFORM_SIMM(vspltish, 6, 13); GEN_VXFORM_SIMM(vspltisw, 6, 14); +#define GEN_VXFORM_UIMM(name, opc2, opc3) \ + GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ + { \ + TCGv_ptr rb, rd; \ + TCGv_i32 uimm; \ + if (unlikely(!ctx->altivec_enabled)) { \ + gen_exception(ctx, POWERPC_EXCP_VPU); \ + return; \ + } \ + uimm = tcg_const_i32(UIMM5(ctx->opcode)); \ + rb = gen_avr_ptr(rB(ctx->opcode)); \ + rd = gen_avr_ptr(rD(ctx->opcode)); \ + gen_helper_##name (rd, rb, uimm); \ + tcg_temp_free_i32(uimm); \ + tcg_temp_free_ptr(rb); \ + tcg_temp_free_ptr(rd); \ + } + #define GEN_VXRFORM1(opname, name, str, opc2, opc3) \ GEN_HANDLER2(name, str, 0x4, opc2, opc3, 0x00000000, PPC_ALTIVEC) \ { \ -- 1.6.0.5