* [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions
@ 2009-01-12 8:10 Amit Shah
0 siblings, 0 replies; 4+ messages in thread
From: Amit Shah @ 2009-01-12 8:10 UTC (permalink / raw)
To: qemu-devel; +Cc: Amit Shah, aliguori, avi, kvm
The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4 and 0xb.
Make sure we pass the value to the instruction.
Also convert to the qemu-style whitespace for the surrounding code.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
---
qemu/target-i386/cpu.h | 2 +-
qemu/target-i386/helper.c | 36 +++++++++++++++++++-----------------
qemu/target-i386/op_helper.c | 2 +-
3 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h
index 944e386..d9834db 100644
--- a/qemu/target-i386/cpu.h
+++ b/qemu/target-i386/cpu.h
@@ -743,7 +743,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo,
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write, int mmu_idx, int is_softmmu);
void cpu_x86_set_a20(CPUX86State *env, int a20_state);
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx);
diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c
index cda0390..070c785 100644
--- a/qemu/target-i386/helper.c
+++ b/qemu/target-i386/helper.c
@@ -1377,7 +1377,8 @@ static void breakpoint_handler(CPUState *env)
}
#endif /* !CONFIG_USER_ONLY */
-static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
+static void host_cpuid(uint32_t function, uint32_t count,
+ uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
#if defined(CONFIG_KVM) || defined(USE_KVM)
@@ -1385,19 +1386,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#ifdef __x86_64__
asm volatile("cpuid"
- : "=a"(vec[0]), "=b"(vec[1]),
- "=c"(vec[2]), "=d"(vec[3])
- : "0"(function) : "cc");
+ : "=a"(vec[0]), "=b"(vec[1]),
+ "=c"(vec[2]), "=d"(vec[3])
+ : "0"(function), "c"(count) : "cc");
#else
asm volatile("pusha \n\t"
- "cpuid \n\t"
- "mov %%eax, 0(%1) \n\t"
- "mov %%ebx, 4(%1) \n\t"
- "mov %%ecx, 8(%1) \n\t"
- "mov %%edx, 12(%1) \n\t"
- "popa"
- : : "a"(function), "S"(vec)
- : "memory", "cc");
+ "cpuid \n\t"
+ "mov %%eax, 0(%1) \n\t"
+ "mov %%ebx, 4(%1) \n\t"
+ "mov %%ecx, 8(%1) \n\t"
+ "mov %%edx, 12(%1) \n\t"
+ "popa"
+ : : "a"(function), "c"(count), "S"(vec)
+ : "memory", "cc");
#endif
if (eax)
@@ -1411,10 +1412,12 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#endif
}
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
+
+ fprintf(stderr, "cpuid requested, %x, ecx=%x\n", index, *ecx);
/* test if maximum index reached */
if (index & 0x80000000) {
if (index > env->cpuid_xlevel)
@@ -1436,7 +1439,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
* actuall cpu, and say goodbye to migration between different vendors
* is you use compatibility mode. */
if (kvm_enabled())
- host_cpuid(0, NULL, ebx, ecx, edx);
+ host_cpuid(0, 0, NULL, ebx, ecx, edx);
break;
case 1:
*eax = env->cpuid_version;
@@ -1457,7 +1460,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
break;
case 4:
/* cache info: needed for Core compatibility */
- switch (*ecx) {
+ switch (count) {
case 0: /* L1 dcache info */
*eax = 0x0000121;
*ebx = 0x1c0003f;
@@ -1483,7 +1486,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
*edx = 0;
break;
}
-
break;
case 5:
/* mwait info: needed for Core compatibility */
@@ -1528,7 +1530,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
if (kvm_enabled()) {
uint32_t h_eax, h_edx;
- host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx);
+ host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx);
/* disable CPU features that the host does not support */
diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c
index 6e0e32e..74ba643 100644
--- a/qemu/target-i386/op_helper.c
+++ b/qemu/target-i386/op_helper.c
@@ -1898,7 +1898,7 @@ void helper_cpuid(void)
helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0);
- cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
EAX = eax;
EBX = ebx;
ECX = ecx;
--
1.6.0.6
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions
2009-01-13 7:09 [Qemu-devel] v2: KVM: support for 'count' in CPUID functions 4, 0xb and 0xd Amit Shah
@ 2009-01-13 7:09 ` Amit Shah
0 siblings, 0 replies; 4+ messages in thread
From: Amit Shah @ 2009-01-13 7:09 UTC (permalink / raw)
To: qemu-devel; +Cc: Amit Shah, aliguori, avi, kvm
The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4, 0xb
and 0xd. Make sure we pass the value to the instruction.
Also convert to the qemu-style whitespace for the surrounding code.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
---
qemu/target-i386/cpu.h | 2 +-
qemu/target-i386/helper.c | 34 +++++++++++++++++-----------------
qemu/target-i386/kvm.c | 8 ++++----
qemu/target-i386/op_helper.c | 2 +-
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h
index 944e386..d9834db 100644
--- a/qemu/target-i386/cpu.h
+++ b/qemu/target-i386/cpu.h
@@ -743,7 +743,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo,
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write, int mmu_idx, int is_softmmu);
void cpu_x86_set_a20(CPUX86State *env, int a20_state);
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx);
diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c
index cda0390..4c1e541 100644
--- a/qemu/target-i386/helper.c
+++ b/qemu/target-i386/helper.c
@@ -1377,7 +1377,8 @@ static void breakpoint_handler(CPUState *env)
}
#endif /* !CONFIG_USER_ONLY */
-static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
+static void host_cpuid(uint32_t function, uint32_t count,
+ uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
#if defined(CONFIG_KVM) || defined(USE_KVM)
@@ -1385,19 +1386,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#ifdef __x86_64__
asm volatile("cpuid"
- : "=a"(vec[0]), "=b"(vec[1]),
- "=c"(vec[2]), "=d"(vec[3])
- : "0"(function) : "cc");
+ : "=a"(vec[0]), "=b"(vec[1]),
+ "=c"(vec[2]), "=d"(vec[3])
+ : "0"(function), "c"(count) : "cc");
#else
asm volatile("pusha \n\t"
- "cpuid \n\t"
- "mov %%eax, 0(%1) \n\t"
- "mov %%ebx, 4(%1) \n\t"
- "mov %%ecx, 8(%1) \n\t"
- "mov %%edx, 12(%1) \n\t"
- "popa"
- : : "a"(function), "S"(vec)
- : "memory", "cc");
+ "cpuid \n\t"
+ "mov %%eax, 0(%1) \n\t"
+ "mov %%ebx, 4(%1) \n\t"
+ "mov %%ecx, 8(%1) \n\t"
+ "mov %%edx, 12(%1) \n\t"
+ "popa"
+ : : "a"(function), "c"(count), "S"(vec)
+ : "memory", "cc");
#endif
if (eax)
@@ -1411,7 +1412,7 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#endif
}
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
@@ -1436,7 +1437,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
* actuall cpu, and say goodbye to migration between different vendors
* is you use compatibility mode. */
if (kvm_enabled())
- host_cpuid(0, NULL, ebx, ecx, edx);
+ host_cpuid(0, 0, NULL, ebx, ecx, edx);
break;
case 1:
*eax = env->cpuid_version;
@@ -1457,7 +1458,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
break;
case 4:
/* cache info: needed for Core compatibility */
- switch (*ecx) {
+ switch (count) {
case 0: /* L1 dcache info */
*eax = 0x0000121;
*ebx = 0x1c0003f;
@@ -1483,7 +1484,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
*edx = 0;
break;
}
-
break;
case 5:
/* mwait info: needed for Core compatibility */
@@ -1528,7 +1528,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
if (kvm_enabled()) {
uint32_t h_eax, h_edx;
- host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx);
+ host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx);
/* disable CPU features that the host does not support */
diff --git a/qemu/target-i386/kvm.c b/qemu/target-i386/kvm.c
index f87bf36..bef3150 100644
--- a/qemu/target-i386/kvm.c
+++ b/qemu/target-i386/kvm.c
@@ -44,13 +44,13 @@ int kvm_arch_init_vcpu(CPUState *env)
cpuid_i = 0;
- cpu_x86_cpuid(env, 0, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
@@ -58,13 +58,13 @@ int kvm_arch_init_vcpu(CPUState *env)
c->edx = edx;
}
- cpu_x86_cpuid(env, 0x80000000, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0x80000000, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0x80000000; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c
index 6e0e32e..74ba643 100644
--- a/qemu/target-i386/op_helper.c
+++ b/qemu/target-i386/op_helper.c
@@ -1898,7 +1898,7 @@ void helper_cpuid(void)
helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0);
- cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
EAX = eax;
EBX = ebx;
ECX = ecx;
--
1.6.0.6
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions
2009-02-04 16:34 [Qemu-devel] KVM: completely support cpuid functions 2, 4, b, d Amit Shah
@ 2009-02-04 16:34 ` Amit Shah
0 siblings, 0 replies; 4+ messages in thread
From: Amit Shah @ 2009-02-04 16:34 UTC (permalink / raw)
To: aliguori; +Cc: Amit Shah, qemu-devel
The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4, 0xb
and 0xd. Make sure we pass the value to the instruction.
Also convert to the qemu-style whitespace for the surrounding code.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
---
qemu/target-i386/cpu.h | 2 +-
qemu/target-i386/helper.c | 34 +++++++++++++++++-----------------
qemu/target-i386/kvm.c | 8 ++++----
qemu/target-i386/op_helper.c | 2 +-
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h
index 0a4f1d7..a6bbeb2 100644
--- a/qemu/target-i386/cpu.h
+++ b/qemu/target-i386/cpu.h
@@ -772,7 +772,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo,
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write, int mmu_idx, int is_softmmu);
void cpu_x86_set_a20(CPUX86State *env, int a20_state);
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx);
diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c
index db9f397..de5891d 100644
--- a/qemu/target-i386/helper.c
+++ b/qemu/target-i386/helper.c
@@ -1375,7 +1375,8 @@ static void breakpoint_handler(CPUState *env)
}
#endif /* !CONFIG_USER_ONLY */
-static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
+static void host_cpuid(uint32_t function, uint32_t count,
+ uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
#if defined(CONFIG_KVM)
@@ -1383,19 +1384,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#ifdef __x86_64__
asm volatile("cpuid"
- : "=a"(vec[0]), "=b"(vec[1]),
- "=c"(vec[2]), "=d"(vec[3])
- : "0"(function) : "cc");
+ : "=a"(vec[0]), "=b"(vec[1]),
+ "=c"(vec[2]), "=d"(vec[3])
+ : "0"(function), "c"(count) : "cc");
#else
asm volatile("pusha \n\t"
- "cpuid \n\t"
- "mov %%eax, 0(%1) \n\t"
- "mov %%ebx, 4(%1) \n\t"
- "mov %%ecx, 8(%1) \n\t"
- "mov %%edx, 12(%1) \n\t"
- "popa"
- : : "a"(function), "S"(vec)
- : "memory", "cc");
+ "cpuid \n\t"
+ "mov %%eax, 0(%1) \n\t"
+ "mov %%ebx, 4(%1) \n\t"
+ "mov %%ecx, 8(%1) \n\t"
+ "mov %%edx, 12(%1) \n\t"
+ "popa"
+ : : "a"(function), "c"(count), "S"(vec)
+ : "memory", "cc");
#endif
if (eax)
@@ -1409,7 +1410,7 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#endif
}
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
@@ -1434,7 +1435,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
* actuall cpu, and say goodbye to migration between different vendors
* is you use compatibility mode. */
if (kvm_enabled())
- host_cpuid(0, NULL, ebx, ecx, edx);
+ host_cpuid(0, 0, NULL, ebx, ecx, edx);
break;
case 1:
*eax = env->cpuid_version;
@@ -1455,7 +1456,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
break;
case 4:
/* cache info: needed for Core compatibility */
- switch (*ecx) {
+ switch (count) {
case 0: /* L1 dcache info */
*eax = 0x0000121;
*ebx = 0x1c0003f;
@@ -1481,7 +1482,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
*edx = 0;
break;
}
-
break;
case 5:
/* mwait info: needed for Core compatibility */
@@ -1526,7 +1526,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
if (kvm_enabled()) {
uint32_t h_eax, h_edx;
- host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx);
+ host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx);
/* disable CPU features that the host does not support */
diff --git a/qemu/target-i386/kvm.c b/qemu/target-i386/kvm.c
index 49766e2..5de3264 100644
--- a/qemu/target-i386/kvm.c
+++ b/qemu/target-i386/kvm.c
@@ -44,13 +44,13 @@ int kvm_arch_init_vcpu(CPUState *env)
cpuid_i = 0;
- cpu_x86_cpuid(env, 0, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
@@ -58,13 +58,13 @@ int kvm_arch_init_vcpu(CPUState *env)
c->edx = edx;
}
- cpu_x86_cpuid(env, 0x80000000, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0x80000000, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0x80000000; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c
index c2eda86..6aaa705 100644
--- a/qemu/target-i386/op_helper.c
+++ b/qemu/target-i386/op_helper.c
@@ -1913,7 +1913,7 @@ void helper_cpuid(void)
helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0);
- cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
EAX = eax;
EBX = ebx;
ECX = ecx;
--
1.6.0.6
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions
2009-02-09 14:09 [Qemu-devel] v23: KVM: Complete support for cpuid functions 2, 4, b, d Amit Shah
@ 2009-02-09 14:09 ` Amit Shah
0 siblings, 0 replies; 4+ messages in thread
From: Amit Shah @ 2009-02-09 14:09 UTC (permalink / raw)
To: aliguori; +Cc: Amit Shah, qemu-devel
The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4, 0xb
and 0xd. Make sure we pass the value to the instruction.
Also convert to the qemu-style whitespace for the surrounding code.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
---
qemu/target-i386/cpu.h | 2 +-
qemu/target-i386/helper.c | 34 +++++++++++++++++-----------------
qemu/target-i386/kvm.c | 8 ++++----
qemu/target-i386/op_helper.c | 2 +-
4 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h
index 0a4f1d7..a6bbeb2 100644
--- a/qemu/target-i386/cpu.h
+++ b/qemu/target-i386/cpu.h
@@ -772,7 +772,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo,
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write, int mmu_idx, int is_softmmu);
void cpu_x86_set_a20(CPUX86State *env, int a20_state);
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx);
diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c
index 5950c97..7152dc4 100644
--- a/qemu/target-i386/helper.c
+++ b/qemu/target-i386/helper.c
@@ -1403,7 +1403,8 @@ static void breakpoint_handler(CPUState *env)
}
#endif /* !CONFIG_USER_ONLY */
-static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
+static void host_cpuid(uint32_t function, uint32_t count,
+ uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
#if defined(CONFIG_KVM)
@@ -1411,19 +1412,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#ifdef __x86_64__
asm volatile("cpuid"
- : "=a"(vec[0]), "=b"(vec[1]),
- "=c"(vec[2]), "=d"(vec[3])
- : "0"(function) : "cc");
+ : "=a"(vec[0]), "=b"(vec[1]),
+ "=c"(vec[2]), "=d"(vec[3])
+ : "0"(function), "c"(count) : "cc");
#else
asm volatile("pusha \n\t"
- "cpuid \n\t"
- "mov %%eax, 0(%1) \n\t"
- "mov %%ebx, 4(%1) \n\t"
- "mov %%ecx, 8(%1) \n\t"
- "mov %%edx, 12(%1) \n\t"
- "popa"
- : : "a"(function), "S"(vec)
- : "memory", "cc");
+ "cpuid \n\t"
+ "mov %%eax, 0(%1) \n\t"
+ "mov %%ebx, 4(%1) \n\t"
+ "mov %%ecx, 8(%1) \n\t"
+ "mov %%edx, 12(%1) \n\t"
+ "popa"
+ : : "a"(function), "c"(count), "S"(vec)
+ : "memory", "cc");
#endif
if (eax)
@@ -1437,7 +1438,7 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx,
#endif
}
-void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
+void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
uint32_t *eax, uint32_t *ebx,
uint32_t *ecx, uint32_t *edx)
{
@@ -1462,7 +1463,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
* actuall cpu, and say goodbye to migration between different vendors
* is you use compatibility mode. */
if (kvm_enabled())
- host_cpuid(0, NULL, ebx, ecx, edx);
+ host_cpuid(0, 0, NULL, ebx, ecx, edx);
break;
case 1:
*eax = env->cpuid_version;
@@ -1483,7 +1484,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
break;
case 4:
/* cache info: needed for Core compatibility */
- switch (*ecx) {
+ switch (count) {
case 0: /* L1 dcache info */
*eax = 0x0000121;
*ebx = 0x1c0003f;
@@ -1509,7 +1510,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
*edx = 0;
break;
}
-
break;
case 5:
/* mwait info: needed for Core compatibility */
@@ -1554,7 +1554,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
if (kvm_enabled()) {
uint32_t h_eax, h_edx;
- host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx);
+ host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx);
/* disable CPU features that the host does not support */
diff --git a/qemu/target-i386/kvm.c b/qemu/target-i386/kvm.c
index 0834e62..123f7d2 100644
--- a/qemu/target-i386/kvm.c
+++ b/qemu/target-i386/kvm.c
@@ -44,13 +44,13 @@ int kvm_arch_init_vcpu(CPUState *env)
cpuid_i = 0;
- cpu_x86_cpuid(env, 0, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
@@ -58,13 +58,13 @@ int kvm_arch_init_vcpu(CPUState *env)
c->edx = edx;
}
- cpu_x86_cpuid(env, 0x80000000, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, 0x80000000, 0, &eax, &ebx, &ecx, &edx);
limit = eax;
for (i = 0x80000000; i <= limit; i++) {
struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++];
- cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx);
c->function = i;
c->eax = eax;
c->ebx = ebx;
diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c
index 87c7a57..217916a 100644
--- a/qemu/target-i386/op_helper.c
+++ b/qemu/target-i386/op_helper.c
@@ -1913,7 +1913,7 @@ void helper_cpuid(void)
helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0);
- cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx);
+ cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);
EAX = eax;
EBX = ebx;
ECX = ecx;
--
1.6.0.6
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2009-02-09 14:09 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2009-01-12 8:10 [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions Amit Shah
-- strict thread matches above, loose matches on Subject: below --
2009-01-13 7:09 [Qemu-devel] v2: KVM: support for 'count' in CPUID functions 4, 0xb and 0xd Amit Shah
2009-01-13 7:09 ` [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions Amit Shah
2009-02-04 16:34 [Qemu-devel] KVM: completely support cpuid functions 2, 4, b, d Amit Shah
2009-02-04 16:34 ` [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions Amit Shah
2009-02-09 14:09 [Qemu-devel] v23: KVM: Complete support for cpuid functions 2, 4, b, d Amit Shah
2009-02-09 14:09 ` [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions Amit Shah
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