From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LQ6PT-00043L-KJ for qemu-devel@nongnu.org; Thu, 22 Jan 2009 15:44:19 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LQ6PS-00041x-JU for qemu-devel@nongnu.org; Thu, 22 Jan 2009 15:44:19 -0500 Received: from [199.232.76.173] (port=38014 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LQ6PR-00041V-Iz for qemu-devel@nongnu.org; Thu, 22 Jan 2009 15:44:18 -0500 Received: from mx20.gnu.org ([199.232.41.8]:40962) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LQ6PR-0005K5-8x for qemu-devel@nongnu.org; Thu, 22 Jan 2009 15:44:17 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LQ6PQ-0005it-KU for qemu-devel@nongnu.org; Thu, 22 Jan 2009 15:44:16 -0500 From: Nathan Froyd Date: Thu, 22 Jan 2009 12:44:05 -0800 Message-Id: <1232657054-30100-6-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1232657054-30100-1-git-send-email-froydnj@codesourcery.com> References: <1232657054-30100-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 05/14] Make mtvscr use a helper Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Nathan Froyd Do this so we can set float statuses once per mtvscr, rather than once per Altivec instruction. Signed-off-by: Nathan Froyd --- target-ppc/helper.h | 1 + target-ppc/op_helper.c | 10 ++++++++++ target-ppc/translate.c | 9 ++++----- 3 files changed, 15 insertions(+), 5 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 755bfba..8c04ba7 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -220,6 +220,7 @@ DEF_HELPER_4(vmsumuhs, void, avr, avr, avr, avr) DEF_HELPER_4(vmsumshm, void, avr, avr, avr, avr) DEF_HELPER_4(vmsumshs, void, avr, avr, avr, avr) DEF_HELPER_4(vmladduhm, void, avr, avr, avr, avr) +DEF_HELPER_1(mtvscr, void, avr); DEF_HELPER_2(lvebx, void, avr, tl) DEF_HELPER_2(lvehx, void, avr, tl) DEF_HELPER_2(lvewx, void, avr, tl) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 3086bfd..107f977 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -2067,6 +2067,16 @@ STVE(stvewx, stl, bswap32, u32) #undef I #undef LVE +void helper_mtvscr (ppc_avr_t *r) +{ +#if defined(WORDS_BIGENDIAN) + env->vscr = r->u32[3]; +#else + env->vscr = r->u32[0]; +#endif + set_flush_to_zero(vscr_nj, &env->vec_status); +} + void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 1bbe7f5..19abec1 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6268,15 +6268,14 @@ GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC) GEN_HANDLER(mtvscr, 0x04, 0x2, 0x19, 0x03ff0000, PPC_ALTIVEC) { - TCGv_i32 t; + TCGv_ptr p; if (unlikely(!ctx->altivec_enabled)) { gen_exception(ctx, POWERPC_EXCP_VPU); return; } - t = tcg_temp_new_i32(); - tcg_gen_trunc_i64_i32(t, cpu_avrl[rD(ctx->opcode)]); - tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, vscr)); - tcg_temp_free_i32(t); + p = gen_avr_ptr(rD(ctx->opcode)); + gen_helper_mtvscr(p); + tcg_temp_free_ptr(p); } /* Logical operations */ -- 1.6.0.5