From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LQ90m-0007vA-MX for qemu-devel@nongnu.org; Thu, 22 Jan 2009 18:31:00 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LQ90l-0007un-TW for qemu-devel@nongnu.org; Thu, 22 Jan 2009 18:31:00 -0500 Received: from [199.232.76.173] (port=39475 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LQ90l-0007uf-N0 for qemu-devel@nongnu.org; Thu, 22 Jan 2009 18:30:59 -0500 Received: from mx20.gnu.org ([199.232.41.8]:44742) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LQ90l-0005G3-8F for qemu-devel@nongnu.org; Thu, 22 Jan 2009 18:30:59 -0500 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LQ90j-00024k-In for qemu-devel@nongnu.org; Thu, 22 Jan 2009 18:30:57 -0500 From: Nathan Froyd Date: Thu, 22 Jan 2009 12:44:08 -0800 Message-Id: <1232657054-30100-9-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1232657054-30100-1-git-send-email-froydnj@codesourcery.com> References: <1232657054-30100-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 08/14] Add vmaddfp and vnmsubfp instructions Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Nathan Froyd Do the computation in higher precision and check for invalid operation conditions. Signed-off-by: Nathan Froyd --- target-ppc/helper.h | 2 + target-ppc/op_helper.c | 54 ++++++++++++++++++++++++++++++++++++++++++++++++ target-ppc/translate.c | 1 + 3 files changed, 57 insertions(+), 0 deletions(-) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index a5d1972..6f5d6a6 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -236,6 +236,8 @@ DEF_HELPER_3(vaddfp, void, avr, avr, avr) DEF_HELPER_3(vsubfp, void, avr, avr, avr) DEF_HELPER_3(vmaxfp, void, avr, avr, avr) DEF_HELPER_3(vminfp, void, avr, avr, avr) +DEF_HELPER_4(vmaddfp, void, avr, avr, avr, avr) +DEF_HELPER_4(vnmsubfp, void, avr, avr, avr, avr) DEF_HELPER_1(efscfsi, i32, i32) DEF_HELPER_1(efscfui, i32, i32) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index d952113..532a08a 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -2223,6 +2223,29 @@ VCMP(gtsw, >, s32) #undef VCMP_DO #undef VCMP +void helper_vmaddfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +{ + int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { + HANDLE_NAN3(r->f[i], a->f[i], b->f[i], c->f[i]) { + /* Need to do the computation in higher precision and round + * once at the end. */ + float64 af, cf; + af = float32_to_float64(a->f[i], &env->vec_status); + cf = float32_to_float64(c->f[i], &env->vec_status); + if ((float64_is_infinity(af) && float64_is_zero(cf)) || + (float64_is_zero(af) && float64_is_infinity(cf))) { + r->u32[i] = 0x7fc00000; + } else { + float64 t = float64_mul(af, cf, &env->vec_status); + float64 bf = float32_to_float64(b->f[i], &env->vec_status); + t = float64_add(t, bf, &env->vec_status); + r->f[i] = float64_to_float32(t, &env->vec_status); + } + } + } +} + void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int sat = 0; @@ -2460,6 +2483,37 @@ VMUL(uh, u16, u32) #undef VMUL_DO #undef VMUL +void helper_vnmsubfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +{ + int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { + HANDLE_NAN3(r->f[i], a->f[i], b->f[i], c->f[i]) { + /* Need to do the computation is higher precision and round + * once at the end. */ + float64 af, cf; + af = float32_to_float64(a->f[i], &env->vec_status); + cf = float32_to_float64(c->f[i], &env->vec_status); + if ((float64_is_infinity(af) && float64_is_zero(cf)) || + (float64_is_zero(af) && float64_is_infinity(cf))) { + r->u32[i] = 0x7fc00000; + } else { + float64 t = float64_mul(af, cf, &env->vec_status); + float64 bf = float32_to_float64(b->f[i], &env->vec_status); + if (unlikely(float64_is_infinity(t) && + float64_is_infinity(bf) && + float64_is_neg(t) == float64_is_neg(bf))) { + /* Magnitude subtraction of infinities */ + r->u32[i] = 0x7fc00000; + } else { + t = float64_sub(t, bf, &env->vec_status); + t = float64_chs(t); + r->f[i] = float64_to_float32(t, &env->vec_status); + } + } + } + } +} + void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { ppc_avr_t result; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 6ff46e0..8b67333 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6577,6 +6577,7 @@ GEN_VAFORM_PAIRED(vmsumubm, vmsummbm, 18) GEN_VAFORM_PAIRED(vmsumuhm, vmsumuhs, 19) GEN_VAFORM_PAIRED(vmsumshm, vmsumshs, 20) GEN_VAFORM_PAIRED(vsel, vperm, 21) +GEN_VAFORM_PAIRED(vmaddfp, vnmsubfp, 23) /*** SPE extension ***/ /* Register moves */ -- 1.6.0.5