From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LUkiE-0000Qo-Vj for qemu-devel@nongnu.org; Wed, 04 Feb 2009 11:34:55 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LUkiE-0000Q6-F6 for qemu-devel@nongnu.org; Wed, 04 Feb 2009 11:34:54 -0500 Received: from [199.232.76.173] (port=46953 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LUkiD-0000Q1-Ue for qemu-devel@nongnu.org; Wed, 04 Feb 2009 11:34:54 -0500 Received: from mx2.redhat.com ([66.187.237.31]:56136) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LUkiD-0001rY-Cv for qemu-devel@nongnu.org; Wed, 04 Feb 2009 11:34:53 -0500 From: Amit Shah Date: Wed, 4 Feb 2009 22:04:58 +0530 Message-Id: <1233765300-21850-2-git-send-email-amit.shah@redhat.com> In-Reply-To: <1233765300-21850-1-git-send-email-amit.shah@redhat.com> References: <1233765300-21850-1-git-send-email-amit.shah@redhat.com> Subject: [Qemu-devel] [PATCH] KVM: CPUID takes ecx as input value for some functions Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: aliguori@us.ibm.com Cc: Amit Shah , qemu-devel@nongnu.org The CPUID instruction takes the value of ECX as an input parameter in addition to the value of EAX as the count for functions 4, 0xb and 0xd. Make sure we pass the value to the instruction. Also convert to the qemu-style whitespace for the surrounding code. Signed-off-by: Amit Shah --- qemu/target-i386/cpu.h | 2 +- qemu/target-i386/helper.c | 34 +++++++++++++++++----------------- qemu/target-i386/kvm.c | 8 ++++---- qemu/target-i386/op_helper.c | 2 +- 4 files changed, 23 insertions(+), 23 deletions(-) diff --git a/qemu/target-i386/cpu.h b/qemu/target-i386/cpu.h index 0a4f1d7..a6bbeb2 100644 --- a/qemu/target-i386/cpu.h +++ b/qemu/target-i386/cpu.h @@ -772,7 +772,7 @@ int cpu_x86_signal_handler(int host_signum, void *pinfo, int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx, int is_softmmu); void cpu_x86_set_a20(CPUX86State *env, int a20_state); -void cpu_x86_cpuid(CPUX86State *env, uint32_t index, +void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); diff --git a/qemu/target-i386/helper.c b/qemu/target-i386/helper.c index db9f397..de5891d 100644 --- a/qemu/target-i386/helper.c +++ b/qemu/target-i386/helper.c @@ -1375,7 +1375,8 @@ static void breakpoint_handler(CPUState *env) } #endif /* !CONFIG_USER_ONLY */ -static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, +static void host_cpuid(uint32_t function, uint32_t count, + uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { #if defined(CONFIG_KVM) @@ -1383,19 +1384,19 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, #ifdef __x86_64__ asm volatile("cpuid" - : "=a"(vec[0]), "=b"(vec[1]), - "=c"(vec[2]), "=d"(vec[3]) - : "0"(function) : "cc"); + : "=a"(vec[0]), "=b"(vec[1]), + "=c"(vec[2]), "=d"(vec[3]) + : "0"(function), "c"(count) : "cc"); #else asm volatile("pusha \n\t" - "cpuid \n\t" - "mov %%eax, 0(%1) \n\t" - "mov %%ebx, 4(%1) \n\t" - "mov %%ecx, 8(%1) \n\t" - "mov %%edx, 12(%1) \n\t" - "popa" - : : "a"(function), "S"(vec) - : "memory", "cc"); + "cpuid \n\t" + "mov %%eax, 0(%1) \n\t" + "mov %%ebx, 4(%1) \n\t" + "mov %%ecx, 8(%1) \n\t" + "mov %%edx, 12(%1) \n\t" + "popa" + : : "a"(function), "c"(count), "S"(vec) + : "memory", "cc"); #endif if (eax) @@ -1409,7 +1410,7 @@ static void host_cpuid(uint32_t function, uint32_t *eax, uint32_t *ebx, #endif } -void cpu_x86_cpuid(CPUX86State *env, uint32_t index, +void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { @@ -1434,7 +1435,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, * actuall cpu, and say goodbye to migration between different vendors * is you use compatibility mode. */ if (kvm_enabled()) - host_cpuid(0, NULL, ebx, ecx, edx); + host_cpuid(0, 0, NULL, ebx, ecx, edx); break; case 1: *eax = env->cpuid_version; @@ -1455,7 +1456,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, break; case 4: /* cache info: needed for Core compatibility */ - switch (*ecx) { + switch (count) { case 0: /* L1 dcache info */ *eax = 0x0000121; *ebx = 0x1c0003f; @@ -1481,7 +1482,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, *edx = 0; break; } - break; case 5: /* mwait info: needed for Core compatibility */ @@ -1526,7 +1526,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, if (kvm_enabled()) { uint32_t h_eax, h_edx; - host_cpuid(0x80000001, &h_eax, NULL, NULL, &h_edx); + host_cpuid(index, 0, &h_eax, NULL, NULL, &h_edx); /* disable CPU features that the host does not support */ diff --git a/qemu/target-i386/kvm.c b/qemu/target-i386/kvm.c index 49766e2..5de3264 100644 --- a/qemu/target-i386/kvm.c +++ b/qemu/target-i386/kvm.c @@ -44,13 +44,13 @@ int kvm_arch_init_vcpu(CPUState *env) cpuid_i = 0; - cpu_x86_cpuid(env, 0, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, 0, 0, &eax, &ebx, &ecx, &edx); limit = eax; for (i = 0; i <= limit; i++) { struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++]; - cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx); c->function = i; c->eax = eax; c->ebx = ebx; @@ -58,13 +58,13 @@ int kvm_arch_init_vcpu(CPUState *env) c->edx = edx; } - cpu_x86_cpuid(env, 0x80000000, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, 0x80000000, 0, &eax, &ebx, &ecx, &edx); limit = eax; for (i = 0x80000000; i <= limit; i++) { struct kvm_cpuid_entry *c = &cpuid_data.entries[cpuid_i++]; - cpu_x86_cpuid(env, i, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, i, 0, &eax, &ebx, &ecx, &edx); c->function = i; c->eax = eax; c->ebx = ebx; diff --git a/qemu/target-i386/op_helper.c b/qemu/target-i386/op_helper.c index c2eda86..6aaa705 100644 --- a/qemu/target-i386/op_helper.c +++ b/qemu/target-i386/op_helper.c @@ -1913,7 +1913,7 @@ void helper_cpuid(void) helper_svm_check_intercept_param(SVM_EXIT_CPUID, 0); - cpu_x86_cpuid(env, (uint32_t)EAX, &eax, &ebx, &ecx, &edx); + cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx); EAX = eax; EBX = ebx; ECX = ecx; -- 1.6.0.6