Re: [Qemu-devel] [PATCH 10/11] PPC64: Keep SLB in-CPU

[Hollis Blanchard <hollisb@us.ibm.com>]

On Fri, 2009-03-06 at 16:36 +0100, Alexander Graf wrote:
> Real 970 CPUs have the SLB not memory backed, but inside the CPU.
> This breaks bridge mode for 970 for now, but at least keeps us from
> overwriting physical addresses 0x0 - 0x300, rendering our interrupt
> handlers useless.
> 
> I put in some stubs for bridge mode operation that could be enabled
> easily, but for now it's safer to leave that off I guess (970fx doesn't
> have bridge mode AFAIK).

The original code below is absolutely crazy. The architecture never
provided for hardware to write into memory like this in the first place.
In other words, the ifdefed "bridge" code should be removed with
prejudice.

For backwards compatibility, the architecture does allow for
implementations with an SLB to optionally do *lookups* in the (legacy)
segment table.

> diff --git a/target-ppc/helper.c b/target-ppc/helper.c
> index 58b7fe2..95958d4 100644
> --- a/target-ppc/helper.c
> +++ b/target-ppc/helper.c
> @@ -692,14 +692,48 @@ static always_inline int find_pte (CPUState *env, mmu_ctx_t *ctx,
...
> +static void slb_set_entry(CPUPPCState *env, int nr, ppc_slb_t *slb)
> +{
> +    ppc_slb_t *entry = &env->slb[nr];
> +
> +#if 0 // XXX implement bridge mode?
> +    if (bridge_mode) {
> +        target_phys_addr_t sr_base = env->spr[SPR_ASR] + (12 * nr);
> +        
> +        stq_phys(sr_base, slb->tmp64);
> +        stl_phys(sr_base + 8, slb->tmp);
> +    } else
> +#endif
> +    if (slb == entry)
> +        return;
> +
> +    entry->tmp64 = slb->tmp64;
> +    entry->tmp = slb->tmp;
> +}

-- 
Hollis Blanchard
IBM Linux Technology Center