From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Li8GF-0006Ty-18 for qemu-devel@nongnu.org; Fri, 13 Mar 2009 10:21:19 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Li8G7-0006Ly-8G for qemu-devel@nongnu.org; Fri, 13 Mar 2009 10:21:15 -0400 Received: from [199.232.76.173] (port=50624 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Li8G5-0006LF-RC for qemu-devel@nongnu.org; Fri, 13 Mar 2009 10:21:09 -0400 Received: from mel.act-europe.fr ([212.99.106.210]:53565) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Li8G4-0002UO-Pq for qemu-devel@nongnu.org; Fri, 13 Mar 2009 10:21:09 -0400 From: Tristan Gingold Date: Fri, 13 Mar 2009 15:20:42 +0100 Message-Id: <1236954043-91856-24-git-send-email-gingold@adacore.com> In-Reply-To: <1236954043-91856-23-git-send-email-gingold@adacore.com> References: <1236954043-91856-1-git-send-email-gingold@adacore.com> <1236954043-91856-2-git-send-email-gingold@adacore.com> <1236954043-91856-3-git-send-email-gingold@adacore.com> <1236954043-91856-4-git-send-email-gingold@adacore.com> <1236954043-91856-5-git-send-email-gingold@adacore.com> <1236954043-91856-6-git-send-email-gingold@adacore.com> <1236954043-91856-7-git-send-email-gingold@adacore.com> <1236954043-91856-8-git-send-email-gingold@adacore.com> <1236954043-91856-9-git-send-email-gingold@adacore.com> <1236954043-91856-10-git-send-email-gingold@adacore.com> <1236954043-91856-11-git-send-email-gingold@adacore.com> <1236954043-91856-12-git-send-email-gingold@adacore.com> <1236954043-91856-13-git-send-email-gingold@adacore.com> <1236954043-91856-14-git-send-email-gingold@adacore.com> <1236954043-91856-15-git-send-email-gingold@adacore.com> <1236954043-91856-16-git-send-email-gingold@adacore.com> <1236954043-91856-17-git-send-email-gingold@adacore.com> <1236954043-91856-18-git-send-email-gingold@adacore.com> <1236954043-91856-19-git-send-email-gingold@adacore.com> <1236954043-91856-20-git-send-email-gingold@adacore.com> <1236954043-91856-21-git-send-email-gingold@adacore.com> <1236954043-91856-22-git-send-email-gingold@adacore.com> <1236954043-91856-23-git-send-email-gingold@adacore.com> Subject: [Qemu-devel] [PATCH 23/24] Correctly decode hw_ld/hw_st opcodes for all alpha implementations. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Tristan Gingold Allow privilegied pal_code only in kernel mode. Signed-off-by: Tristan Gingold --- target-alpha/translate.c | 32 ++++++++++++++++++++++++-------- 1 files changed, 24 insertions(+), 8 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 3eef2dc..6942453 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -52,6 +52,7 @@ struct DisasContext { int pal_mode; #endif uint32_t amask; + uint32_t implver; }; /* global register indexes */ @@ -103,6 +104,20 @@ static void alpha_translate_init(void) done_init = 1; } +static inline int get_mxcr_iprn(DisasContext *ctx, uint32_t insn) +{ + switch (ctx->implver) { + case IMPLVER_2106x: + return insn & 0xff; + case IMPLVER_21164: + return insn & 0xffff; + case IMPLVER_21264: + return (insn >> 8) & 0xff; + default: + abort(); + } +} + static always_inline void gen_excp (DisasContext *ctx, int exception, int error_code) { @@ -689,7 +704,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) #if !defined (CONFIG_USER_ONLY) } else if (palcode < 0x40) { /* Privileged PAL code */ - if (ctx->mem_idx & 1) + if (ctx->mem_idx != MMU_KERNEL_IDX) goto invalid_opc; else gen_excp(ctx, EXCP_CALL_PALP + ((palcode & 0x3F) << 6), 0); @@ -1748,7 +1763,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) if (!ctx->pal_mode) goto invalid_opc; if (ra != 31) { - TCGv tmp = tcg_const_i32(insn & 0xFF); + TCGv tmp = tcg_const_i32(get_mxcr_iprn(ctx, insn)); gen_helper_mfpr(cpu_ir[ra], tmp, cpu_ir[ra]); tcg_temp_free(tmp); } @@ -2063,9 +2078,9 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) if (!ctx->pal_mode) goto invalid_opc; else { - TCGv tmp1 = tcg_const_i32(insn & 0xFF); - if (ra != 31) - gen_helper_mtpr(tmp1, cpu_ir[ra]); + TCGv tmp1 = tcg_const_i32(get_mxcr_iprn(ctx, insn)); + if (rb != 31) + gen_helper_mtpr(tmp1, cpu_ir[rb]); else { TCGv tmp2 = tcg_const_i64(0); gen_helper_mtpr(tmp1, tmp2); @@ -2088,8 +2103,8 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) gen_helper_hw_rei(); } else { TCGv tmp; - - if (ra != 31) { + + if (rb != 31) { tmp = tcg_temp_new(); tcg_gen_addi_i64(tmp, cpu_ir[rb], (((int64_t)insn << 51) >> 51)); } else @@ -2097,7 +2112,7 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) gen_helper_hw_ret(tmp); tcg_temp_free(tmp); } - ret = 2; + ret = 3; break; #endif case 0x1F: @@ -2353,6 +2368,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env, gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; ctx.pc = pc_start; ctx.amask = env->amask; + ctx.implver = env->implver; #if defined (CONFIG_USER_ONLY) ctx.mem_idx = 0; #else -- 1.6.2