[Qemu-devel] [PATCH 12/25] Add ali1543 super IO pci device.

[Tristan Gingold <gingold@adacore.com>]

This is a very partial implementation just enough for es40 firmware.

Signed-off-by: Tristan Gingold <gingold@adacore.com>
---
 hw/ali1543.c |  138 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/pci.h     |    5 ++
 hw/pci_ids.h |    3 +
 3 files changed, 146 insertions(+), 0 deletions(-)
 create mode 100644 hw/ali1543.c

diff --git a/hw/ali1543.c b/hw/ali1543.c
new file mode 100644
index 0000000..0ff4523
--- /dev/null
+++ b/hw/ali1543.c
@@ -0,0 +1,138 @@
+/*
+ * QEMU Ali 1543c emulation
+ *
+ * Copyright (c) 2009 AdaCore
+ *
+ * Written by Tristan Gingold.
+ *
+ * This work is licensed under the GNU GPL license version 2 or later.
+ *
+ */
+#include <time.h>
+#include <sys/time.h>
+#include "hw.h"
+#include "net.h"
+#include "sysemu.h"
+#include "devices.h"
+#include "boards.h"
+#include "pc.h"
+#include "isa.h"
+#include "qemu-char.h"
+#include "pci.h"
+
+/* Ali 1543 is a south-bridge super-IO.  It contains a DMA, a PIC, a PIT,
+  a ps/2 kbd interface, 2 IDE controller, 1 USB controller (OHCI), 1 FDC,
+  2 serials ports, 1 parallel port and a PMU.  */
+
+//#define DEBUG_CFG
+
+struct ALI1543State {
+    PCIDevice pci;
+
+    qemu_irq *irq; /* Upstream handler. */
+    PITState *pit;
+    qemu_irq *i8259;
+
+    /* Configuration.  */
+    enum cfg_state { CFG_SNOOP, CFG_51, CFG_EN } cfg_state;
+    unsigned char cfg_index;
+};
+
+static void ali_cfg_write(void *opaque, uint32_t addr, uint32_t val)
+{
+    ALI1543State *ali = opaque;
+
+    if ((addr & 1) == 0) {
+        switch (ali->cfg_state) {
+        case CFG_SNOOP:
+            if (val == 0x51)
+                ali->cfg_state = CFG_51;
+            else
+                qemu_log("ali1543-cfg: write %02x to cfg_port\n", val);
+            break;
+        case CFG_51:
+            if (val == 0x23)
+                ali->cfg_state = CFG_EN;
+            else {
+                qemu_log("ali1543-cfg: write %02x to cfg_port (51)\n", val);
+                ali->cfg_state = CFG_SNOOP;
+            }
+            break;
+        case CFG_EN:
+            ali->cfg_index = val;
+            break;
+        }
+    }
+    else {
+#ifdef DEBUG_CFG
+        qemu_log("ali1543-cfg: write %02x to cfg reg %02x (addr=%x)\n",
+                 val, ali->cfg_index, addr);
+#endif
+    }
+}
+
+static uint32_t ali_cfg_read(void *opaque, uint32_t addr)
+{
+    ALI1543State *ali = opaque;
+
+    if ((addr & 1) == 0) {
+        if (ali->cfg_state != CFG_EN) {
+            qemu_log("ali1543-cfg: read fromcfg_port\n");
+            return 0;
+        }
+        else
+            return ali->cfg_index;
+    }
+    else {
+#ifdef DEBUG_CFG
+        qemu_log("ali1543-cfg: read from reg %02x\n", ali->cfg_index);
+#endif
+        return 0;
+    }
+}
+
+ALI1543State *ali1543_init (PCIBus *bus, int devfn, qemu_irq irq)
+{
+    ALI1543State *ali;
+    uint8_t *pci_conf;
+
+    ali = (ALI1543State*)pci_register_device(bus, "Ali1543",
+                                             sizeof(ALI1543State),
+                                             devfn, NULL, NULL);
+
+    pci_conf = ali->pci.config;
+
+    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AL);
+    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_AL_M1533);
+    pci_conf[0x08] = 0xc3; // Revision
+    pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
+    pci_conf[0x2c] = 0; // Subsystem
+    pci_conf[0x2d] = 0;
+    pci_conf[0x2e] = 0;
+    pci_conf[0x2f] = 0;
+
+    register_ioport_read(0x370, 2, 1, ali_cfg_read, ali);
+    register_ioport_write(0x370, 2, 1, ali_cfg_write, ali);
+
+    ali->i8259 = i8259_init(irq);
+
+    /* serial_init already handles NULL CharDriverState but this code adds
+       a more useful label.  */
+    if (serial_hds[0] == NULL)
+        serial_hds[0] = qemu_chr_open("com1", "nul", NULL);
+    if (serial_hds[1] == NULL)
+        serial_hds[1] = qemu_chr_open("com2", "nul", NULL);
+
+    serial_init(0x3f8, ali->i8259[4], 115200, serial_hds[0]);
+    serial_init(0x2f8, ali->i8259[3], 115200, serial_hds[1]);
+    ali->pit = pit_init(0x40, ali->i8259[0]);
+    pcspk_init(ali->pit);
+    DMA_init(0);
+
+    return ali;
+}
+
+qemu_irq ali1543_get_irq(ALI1543State *c, int n)
+{
+    return c->i8259[n];
+}
diff --git a/hw/pci.h b/hw/pci.h
index 4f24895..8251ae5 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -254,4 +254,9 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
 PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
                             qemu_irq *pic, int devfn_min, int nirq);
 
+/* ali1543.c */
+typedef struct ALI1543State ALI1543State;
+ALI1543State *ali1543_init (PCIBus *bus, int devfn, qemu_irq irq);
+qemu_irq ali1543_get_irq(ALI1543State *c, int n);
+
 #endif
diff --git a/hw/pci_ids.h b/hw/pci_ids.h
index 427fcd5..4119ead 100644
--- a/hw/pci_ids.h
+++ b/hw/pci_ids.h
@@ -70,6 +70,9 @@
 #define PCI_VENDOR_ID_CMD                0x1095
 #define PCI_DEVICE_ID_CMD_646            0x0646
 
+#define PCI_VENDOR_ID_AL                 0x10b9
+#define PCI_DEVICE_ID_AL_M1533           0x1533
+
 #define PCI_VENDOR_ID_REALTEK            0x10ec
 #define PCI_DEVICE_ID_REALTEK_8139       0x8139
 
-- 
1.6.2