From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Lnfg8-0003IW-IF for qemu-devel@nongnu.org; Sat, 28 Mar 2009 17:02:56 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Lnfg3-0003DJ-Qn for qemu-devel@nongnu.org; Sat, 28 Mar 2009 17:02:56 -0400 Received: from [199.232.76.173] (port=47433 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Lnfg3-0003D1-LD for qemu-devel@nongnu.org; Sat, 28 Mar 2009 17:02:51 -0400 Received: from mx20.gnu.org ([199.232.41.8]:8042) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Lnfg3-0001yc-65 for qemu-devel@nongnu.org; Sat, 28 Mar 2009 17:02:51 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Lnfg2-0003oK-Kx for qemu-devel@nongnu.org; Sat, 28 Mar 2009 17:02:50 -0400 From: Nathan Froyd Date: Sat, 28 Mar 2009 14:02:47 -0700 Message-Id: <1238274167-7890-11-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1238274167-7890-1-git-send-email-froydnj@codesourcery.com> References: <1238274167-7890-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 10/10] Remove r0 from the allocation pool on ppc/ppc64 Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org r0 is used as a temporary for forming 32-bit constants; it also has unexpected behavior when used as a base register in load and store instructions. Signed-off-by: Nathan Froyd --- tcg/ppc/tcg-target.c | 1 - tcg/ppc64/tcg-target.c | 1 - 2 files changed, 0 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index bdab71d..086c52e 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -112,7 +112,6 @@ static const int tcg_target_reg_alloc_order[] = { #ifndef __linux__ TCG_REG_R13, #endif - TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R24, diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index fc8beba..952d757 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -105,7 +105,6 @@ static const int tcg_target_reg_alloc_order[] = { TCG_REG_R11, TCG_REG_R12, TCG_REG_R13, - TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R24, -- 1.6.0.5