From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LoIbz-00085a-3F for qemu-devel@nongnu.org; Mon, 30 Mar 2009 10:37:15 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LoIbm-0007tN-4J for qemu-devel@nongnu.org; Mon, 30 Mar 2009 10:37:09 -0400 Received: from [199.232.76.173] (port=54197 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LoIbl-0007sw-MW for qemu-devel@nongnu.org; Mon, 30 Mar 2009 10:37:01 -0400 Received: from mel.act-europe.fr ([212.99.106.210]:60662) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LoIbk-00013o-S4 for qemu-devel@nongnu.org; Mon, 30 Mar 2009 10:37:01 -0400 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 24037290056 for ; Mon, 30 Mar 2009 16:36:38 +0200 (CEST) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vyas25hAZcCO for ; Mon, 30 Mar 2009 16:36:36 +0200 (CEST) Received: from ulanbator.act-europe.fr (ulanbator.act-europe.fr [10.10.1.67]) by mel.act-europe.fr (Postfix) with ESMTP id 34220290058 for ; Mon, 30 Mar 2009 16:36:35 +0200 (CEST) From: Tristan Gingold Date: Mon, 30 Mar 2009 16:36:29 +0200 Message-Id: <1238423794-25455-15-git-send-email-gingold@adacore.com> In-Reply-To: <1238423794-25455-14-git-send-email-gingold@adacore.com> References: <1238423794-25455-1-git-send-email-gingold@adacore.com> <1238423794-25455-2-git-send-email-gingold@adacore.com> <1238423794-25455-3-git-send-email-gingold@adacore.com> <1238423794-25455-4-git-send-email-gingold@adacore.com> <1238423794-25455-5-git-send-email-gingold@adacore.com> <1238423794-25455-6-git-send-email-gingold@adacore.com> <1238423794-25455-7-git-send-email-gingold@adacore.com> <1238423794-25455-8-git-send-email-gingold@adacore.com> <1238423794-25455-9-git-send-email-gingold@adacore.com> <1238423794-25455-10-git-send-email-gingold@adacore.com> <1238423794-25455-11-git-send-email-gingold@adacore.com> <1238423794-25455-12-git-send-email-gingold@adacore.com> <1238423794-25455-13-git-send-email-gingold@adacore.com> <1238423794-25455-14-git-send-email-gingold@adacore.com> Subject: [Qemu-devel] [PATCH 14/19] alpha ld helpers now directly return the value. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Remove _kernel helpers as they can be directly generated. Replace ld/st_raw with _phys (bug fix). Change argument name for st helpers (t0/t1 -> val/addr). Signed-off-by: Tristan Gingold --- target-alpha/helper.h | 22 +++++++--------- target-alpha/op_helper.c | 62 ++++++++++++++++++++------------------------- target-alpha/translate.c | 32 ++++++++++++------------ 3 files changed, 54 insertions(+), 62 deletions(-) diff --git a/target-alpha/helper.h b/target-alpha/helper.h index 4c4855d..7c7278f 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -116,18 +116,16 @@ DEF_HELPER_0(restore_mode, void) DEF_HELPER_1(ld_virt_to_phys, i64, i64) DEF_HELPER_1(st_virt_to_phys, i64, i64) -DEF_HELPER_2(ldl_raw, void, i64, i64) -DEF_HELPER_2(ldq_raw, void, i64, i64) -DEF_HELPER_2(ldl_l_raw, void, i64, i64) -DEF_HELPER_2(ldq_l_raw, void, i64, i64) -DEF_HELPER_2(ldl_kernel, void, i64, i64) -DEF_HELPER_2(ldq_kernel, void, i64, i64) -DEF_HELPER_2(ldl_data, void, i64, i64) -DEF_HELPER_2(ldq_data, void, i64, i64) -DEF_HELPER_2(stl_raw, void, i64, i64) -DEF_HELPER_2(stq_raw, void, i64, i64) -DEF_HELPER_2(stl_c_raw, i64, i64, i64) -DEF_HELPER_2(stq_c_raw, i64, i64, i64) +DEF_HELPER_1(ldl_phys, i64, i64) +DEF_HELPER_1(ldq_phys, i64, i64) +DEF_HELPER_1(ldl_l_phys, i64, i64) +DEF_HELPER_1(ldq_l_phys, i64, i64) +DEF_HELPER_1(ldl_data, i64, i64) +DEF_HELPER_1(ldq_data, i64, i64) +DEF_HELPER_2(stl_phys, void, i64, i64) +DEF_HELPER_2(stq_phys, void, i64, i64) +DEF_HELPER_2(stl_c_phys, i64, i64, i64) +DEF_HELPER_2(stq_c_phys, i64, i64, i64) #endif #include "def-helper.h" diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 4b6ada7..9e9289f 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -1091,64 +1091,58 @@ uint64_t helper_st_virt_to_phys (uint64_t virtaddr) return physaddr; } -void helper_ldl_raw(uint64_t t0, uint64_t t1) +uint64_t helper_ldl_phys(uint64_t addr) { - ldl_raw(t1, t0); + return ldl_phys(addr); } -void helper_ldq_raw(uint64_t t0, uint64_t t1) +uint64_t helper_ldq_phys(uint64_t addr) { - ldq_raw(t1, t0); + return ldq_phys(addr); } -void helper_ldl_l_raw(uint64_t t0, uint64_t t1) +uint64_t helper_ldl_l_phys(uint64_t addr) { - env->lock = t1; - ldl_raw(t1, t0); + env->lock = addr; + return ldl_phys(addr); } -void helper_ldq_l_raw(uint64_t t0, uint64_t t1) +uint64_t helper_ldq_l_phys(uint64_t addr) { - env->lock = t1; - ldl_raw(t1, t0); + env->lock = addr; + return ldl_raw(addr); } -void helper_ldl_kernel(uint64_t t0, uint64_t t1) +uint64_t helper_ldl_data(uint64_t addr) { - ldl_kernel(t1, t0); + /* FIXME: ldl_data won't work in case of fault */ + cpu_abort(env, "ldl_data not implemented\n"); + return ldl_data(addr); } -void helper_ldq_kernel(uint64_t t0, uint64_t t1) +uint64_t helper_ldq_data(uint64_t addr) { - ldq_kernel(t1, t0); + /* FIXME: ldq_data won't work in case of fault */ + cpu_abort(env, "ldq_data not implemented\n"); + return ldq_data(addr); } -void helper_ldl_data(uint64_t t0, uint64_t t1) +void helper_stl_phys(uint64_t val, uint64_t addr) { - ldl_data(t1, t0); + stl_phys(addr, val); } -void helper_ldq_data(uint64_t t0, uint64_t t1) +void helper_stq_phys(uint64_t val, uint64_t addr) { - ldq_data(t1, t0); + stq_phys(addr, val); } -void helper_stl_raw(uint64_t t0, uint64_t t1) -{ - stl_raw(t1, t0); -} - -void helper_stq_raw(uint64_t t0, uint64_t t1) -{ - stq_raw(t1, t0); -} - -uint64_t helper_stl_c_raw(uint64_t t0, uint64_t t1) +uint64_t helper_stl_c_phys(uint64_t val, uint64_t addr) { uint64_t ret; - if (t1 == env->lock) { - stl_raw(t1, t0); + if (addr == env->lock) { + stl_phys(addr, val); ret = 0; } else ret = 1; @@ -1158,12 +1152,12 @@ uint64_t helper_stl_c_raw(uint64_t t0, uint64_t t1) return ret; } -uint64_t helper_stq_c_raw(uint64_t t0, uint64_t t1) +uint64_t helper_stq_c_phys(uint64_t val, uint64_t addr) { uint64_t ret; - if (t1 == env->lock) { - stq_raw(t1, t0); + if (addr == env->lock) { + stq_phys(addr, val); ret = 0; } else ret = 1; diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 821f0d4..41f24a5 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -1794,19 +1794,19 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) switch ((insn >> 12) & 0xF) { case 0x0: /* Longword physical access (hw_ldl/p) */ - gen_helper_ldl_raw(cpu_ir[ra], addr); + gen_helper_ldl_phys(cpu_ir[ra], addr); break; case 0x1: /* Quadword physical access (hw_ldq/p) */ - gen_helper_ldq_raw(cpu_ir[ra], addr); + gen_helper_ldq_phys(cpu_ir[ra], addr); break; case 0x2: /* Longword physical access with lock (hw_ldl_l/p) */ - gen_helper_ldl_l_raw(cpu_ir[ra], addr); + gen_helper_ldl_l_phys(cpu_ir[ra], addr); break; case 0x3: /* Quadword physical access with lock (hw_ldq_l/p) */ - gen_helper_ldq_l_raw(cpu_ir[ra], addr); + gen_helper_ldq_l_phys(cpu_ir[ra], addr); break; case 0x4: /* Longword virtual PTE fetch (hw_ldl/v) */ @@ -1825,12 +1825,12 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) case 0x8: /* Longword virtual access (hw_ldl) */ gen_helper_st_virt_to_phys(addr, addr); - gen_helper_ldl_raw(cpu_ir[ra], addr); + gen_helper_ldl_phys(cpu_ir[ra], addr); break; case 0x9: /* Quadword virtual access (hw_ldq) */ gen_helper_st_virt_to_phys(addr, addr); - gen_helper_ldq_raw(cpu_ir[ra], addr); + gen_helper_ldq_phys(cpu_ir[ra], addr); break; case 0xA: /* Longword virtual access with protection check (hw_ldl/w) */ @@ -1844,14 +1844,14 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) /* Longword virtual access with alt access mode (hw_ldl/a)*/ gen_helper_set_alt_mode(); gen_helper_st_virt_to_phys(addr, addr); - gen_helper_ldl_raw(cpu_ir[ra], addr); + gen_helper_ldl_phys(cpu_ir[ra], addr); gen_helper_restore_mode(); break; case 0xD: /* Quadword virtual access with alt access mode (hw_ldq/a) */ gen_helper_set_alt_mode(); gen_helper_st_virt_to_phys(addr, addr); - gen_helper_ldq_raw(cpu_ir[ra], addr); + gen_helper_ldq_phys(cpu_ir[ra], addr); gen_helper_restore_mode(); break; case 0xE: @@ -2123,29 +2123,29 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) switch ((insn >> 12) & 0xF) { case 0x0: /* Longword physical access */ - gen_helper_stl_raw(val, addr); + gen_helper_stl_phys(val, addr); break; case 0x1: /* Quadword physical access */ - gen_helper_stq_raw(val, addr); + gen_helper_stq_phys(val, addr); break; case 0x2: /* Longword physical access with lock */ - gen_helper_stl_c_raw(val, val, addr); + gen_helper_stl_c_phys(val, val, addr); break; case 0x3: /* Quadword physical access with lock */ - gen_helper_stq_c_raw(val, val, addr); + gen_helper_stq_c_phys(val, val, addr); break; case 0x4: /* Longword virtual access */ gen_helper_st_virt_to_phys(addr, addr); - gen_helper_stl_raw(val, addr); + gen_helper_stl_phys(val, addr); break; case 0x5: /* Quadword virtual access */ gen_helper_st_virt_to_phys(addr, addr); - gen_helper_stq_raw(val, addr); + gen_helper_stq_phys(val, addr); break; case 0x6: /* Invalid */ @@ -2169,14 +2169,14 @@ static always_inline int translate_one (DisasContext *ctx, uint32_t insn) /* Longword virtual access with alternate access mode */ gen_helper_set_alt_mode(); gen_helper_st_virt_to_phys(addr, addr); - gen_helper_stl_raw(val, addr); + gen_helper_stl_phys(val, addr); gen_helper_restore_mode(); break; case 0xD: /* Quadword virtual access with alternate access mode */ gen_helper_set_alt_mode(); gen_helper_st_virt_to_phys(addr, addr); - gen_helper_stl_raw(val, addr); + gen_helper_stl_phys(val, addr); gen_helper_restore_mode(); break; case 0xE: -- 1.6.2