From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Lqr7R-0000zE-37 for qemu-devel@nongnu.org; Mon, 06 Apr 2009 11:52:17 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Lqr7M-0000xg-8p for qemu-devel@nongnu.org; Mon, 06 Apr 2009 11:52:16 -0400 Received: from [199.232.76.173] (port=41142 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Lqr7M-0000xd-74 for qemu-devel@nongnu.org; Mon, 06 Apr 2009 11:52:12 -0400 Received: from belushi.uits.indiana.edu ([129.79.1.188]:33921) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Lqr7L-00052A-NF for qemu-devel@nongnu.org; Mon, 06 Apr 2009 11:52:11 -0400 Received: from mail-relay.iu.edu (burns.uits.indiana.edu [129.79.1.202]) by belushi.uits.indiana.edu (8.14.2/8.13.8/IU Messaging Team) with ESMTP id n36Fq9gX021869 for ; Mon, 6 Apr 2009 11:52:09 -0400 Received: from [129.79.35.119] (nibbler.dlib.indiana.edu [129.79.35.119]) (authenticated bits=0) by mail-relay.iu.edu (8.14.2/8.13.8/IU Messaging Team Submission) with ESMTP id n36FpeNj031060 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 6 Apr 2009 11:52:08 -0400 From: Brian Wheeler Content-Type: text/plain Date: Mon, 06 Apr 2009 11:51:30 -0400 Message-Id: <1239033090.1975.78.camel@nibbler.dlib.indiana.edu> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Newbie: How to implement iommu? Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org I've been going through the source (and the list archives) and I must be missing something obvious. I need to translate an address passed to cpu_physical_memory_{read,write} via an IOMMU. I've been told there's a dma api, but I cannot find any documentation about it, nor can I find an obvious user of it. How do I hook into the read/write address translation? I can see that the iommu is setup correctly: typhoon pchip0 read reg=1, val=0000000080000001 typhoon pchip0 read reg=5, val=000000003ff00000 typhoon pchip0 read reg=9, val=0000000000000000 (which basically translates any 32-bit address beginning with 0x80000000 to 0x00000000) and later in the emulation I'm seeing a bunch of readl messages Unassigned mem readl 0000000086246ffc which should have really been looking at physical address 0x6246ffc So how do I catch cpu_physical_memory_{read,write} calls and put my address translation in there? Thanks! Brian