From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LwR7q-0000pv-JU for qemu-devel@nongnu.org; Tue, 21 Apr 2009 21:19:46 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LwR7l-0000nt-VR for qemu-devel@nongnu.org; Tue, 21 Apr 2009 21:19:46 -0400 Received: from [199.232.76.173] (port=58222 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LwR7l-0000nl-LE for qemu-devel@nongnu.org; Tue, 21 Apr 2009 21:19:41 -0400 Received: from mx20.gnu.org ([199.232.41.8]:55475) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LwR7l-000261-FX for qemu-devel@nongnu.org; Tue, 21 Apr 2009 21:19:41 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LwR7k-0005dA-Mn for qemu-devel@nongnu.org; Tue, 21 Apr 2009 21:19:41 -0400 From: Nathan Froyd Date: Tue, 21 Apr 2009 18:12:13 -0700 Message-Id: <1240362737-10053-6-git-send-email-froydnj@codesourcery.com> In-Reply-To: <1240362737-10053-1-git-send-email-froydnj@codesourcery.com> References: <1240362737-10053-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 5/9] implement specialized nand_i{32,64} List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Signed-off-by: Nathan Froyd --- tcg/tcg-op.h | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 543d1b6..13c0967 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1625,14 +1625,25 @@ static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { +#ifdef TCG_TARGET_HAS_nand_i32 + tcg_gen_op3_i32(INDEX_op_nand_i32, ret, arg1, arg2); +#else tcg_gen_and_i32(ret, arg1, arg2); tcg_gen_not_i32(ret, ret); +#endif } static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { +#ifdef TCG_TARGET_HAS_nand_i64 + tcg_gen_op3_i64(INDEX_op_nand_i64, ret, arg1, arg2); +#elif defined(TCG_TARGET_HAS_nand_i32) && TCG_TARGET_REG_BITS == 32 + tcg_gen_nand_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); + tcg_gen_nand_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); +#else tcg_gen_and_i64(ret, arg1, arg2); tcg_gen_not_i64(ret, ret); +#endif } static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) -- 1.6.0.5