From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M7uCB-0001Rz-BQ for qemu-devel@nongnu.org; Sat, 23 May 2009 12:35:39 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M7uCA-0001RN-65 for qemu-devel@nongnu.org; Sat, 23 May 2009 12:35:38 -0400 Received: from [199.232.76.173] (port=36923 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M7uC9-0001RD-Vo for qemu-devel@nongnu.org; Sat, 23 May 2009 12:35:38 -0400 Received: from flounder.pepperfish.net ([87.237.62.181]:57272) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1M7uC9-00059Z-30 for qemu-devel@nongnu.org; Sat, 23 May 2009 12:35:37 -0400 From: Vincent Sanders Date: Sat, 23 May 2009 17:35:19 +0100 Message-Id: <1243096533-22677-2-git-send-email-vince@simtec.co.uk> In-Reply-To: <1243096533-22677-1-git-send-email-vince@simtec.co.uk> References: <1243096533-22677-1-git-send-email-vince@simtec.co.uk> Subject: [Qemu-devel] [PATCH 01/16] Add ARM 920T CPU identifier List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Vincent Sanders Add the CPU Identifier required for ARM 920T cpu cores Signed-off-by: Vincent Sanders --- target-arm/cpu.h | 1 + target-arm/helper.c | 5 +++++ 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index f98655f..eafaeaf 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -370,6 +370,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define ARM_CPUID_ARM1026 0x4106a262 #define ARM_CPUID_ARM926 0x41069265 #define ARM_CPUID_ARM946 0x41059461 +#define ARM_CPUID_ARM920T 0x41129200 #define ARM_CPUID_TI915T 0x54029152 #define ARM_CPUID_TI925T 0x54029252 #define ARM_CPUID_PXA250 0x69052100 diff --git a/target-arm/helper.c b/target-arm/helper.c index 701629a..2b05d15 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -37,6 +37,10 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) { env->cp15.c0_cpuid = id; switch (id) { + case ARM_CPUID_ARM920T: + env->cp15.c0_cachetype = 0x0d172172; + env->cp15.c1_sys = 0x00000078; + break; case ARM_CPUID_ARM926: set_feature(env, ARM_FEATURE_VFP); env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090; @@ -277,6 +281,7 @@ struct arm_cpu_t { }; static const struct arm_cpu_t arm_cpu_names[] = { + { ARM_CPUID_ARM920T, "arm920t"}, { ARM_CPUID_ARM926, "arm926"}, { ARM_CPUID_ARM946, "arm946"}, { ARM_CPUID_ARM1026, "arm1026"}, -- 1.6.0.4