[Qemu-devel] [PATCH 03/17] m68k: define m680x0 CPUs and features

[Laurent Vivier <laurent@vivier.eu>]

This patch defines four new Motorola 680x0 family CPUs:

- M68K_CPUID_M68000,
- M68K_CPUID_M68020,
- M68K_CPUID_M68040,
- M68K_CPUID_M68060

And six new features:

- M68K_FEATURE_SCALED_INDEX, scaled address index register
- M68K_FEATURE_LONG_MULDIV, 32bit multiply/divide
- M68K_FEATURE_QUAD_MULDIV, 64bit multiply/divide
- M68K_FEATURE_BCCL, long conditional branches
- M68K_FEATURE_BITFIELD, bit field instructions
- M68K_FEATURE_FPU, FPU instructions

Following patches implement them...

Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target-m68k/cpu.h    |   13 ++++++++++---
 target-m68k/helper.c |   33 +++++++++++++++++++++++++++++++++
 2 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index feffb6b..eb18e9e 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -181,6 +181,7 @@ void do_m68k_semihosting(CPUM68KState *env, int nr);
    ISA revisions mentioned.  */
 
 enum m68k_features {
+    M68K_FEATURE_M68000,
     M68K_FEATURE_CF_ISA_A,
     M68K_FEATURE_CF_ISA_B, /* (ISA B or C).  */
     M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C).  */
@@ -191,7 +192,13 @@ enum m68k_features {
     M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate).  */
     M68K_FEATURE_USP, /* User Stack Pointer.  (ISA A+, B or C).  */
     M68K_FEATURE_EXT_FULL, /* 68020+ full extension word.  */
-    M68K_FEATURE_WORD_INDEX /* word sized address index registers.  */
+    M68K_FEATURE_WORD_INDEX, /* word sized address index registers.  */
+    M68K_FEATURE_SCALED_INDEX, /* scaled address index registers.  */
+    M68K_FEATURE_LONG_MULDIV,	/* 32 bit multiply/divide. */
+    M68K_FEATURE_QUAD_MULDIV,	/* 64 bit multiply/divide. */
+    M68K_FEATURE_BCCL,		/* Long conditional branches.  */
+    M68K_FEATURE_BITFIELD,	/* Bit field insns.  */
+    M68K_FEATURE_FPU
 };
 
 static inline int m68k_feature(CPUM68KState *env, int feature)
@@ -204,8 +211,8 @@ void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
 void register_m68k_insns (CPUM68KState *env);
 
 #ifdef CONFIG_USER_ONLY
-/* Linux uses 8k pages.  */
-#define TARGET_PAGE_BITS 13
+/* Linux uses 4k pages.  */
+#define TARGET_PAGE_BITS 12
 #else
 /* Smallest TLB entry size is 1k.  */
 #define TARGET_PAGE_BITS 10
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index af9ce22..a22dc97 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -33,6 +33,10 @@
 #define SIGNBIT (1u << 31)
 
 enum m68k_cpuid {
+    M68K_CPUID_M68000,
+    M68K_CPUID_M68020,
+    M68K_CPUID_M68040,
+    M68K_CPUID_M68060,
     M68K_CPUID_M5206,
     M68K_CPUID_M5208,
     M68K_CPUID_CFV4E,
@@ -47,6 +51,10 @@ struct m68k_def_t {
 };
 
 static m68k_def_t m68k_cpu_defs[] = {
+    {"m68000", M68K_CPUID_M68000},
+    {"m68020", M68K_CPUID_M68020},
+    {"m68040", M68K_CPUID_M68040},
+    {"m68060", M68K_CPUID_M68060},
     {"m5206", M68K_CPUID_M5206},
     {"m5208", M68K_CPUID_M5208},
     {"cfv4e", M68K_CPUID_CFV4E},
@@ -107,12 +115,30 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
         return -1;
 
     switch (def->id) {
+    case M68K_CPUID_M68020:
+    case M68K_CPUID_M68040:
+        m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
+    case M68K_CPUID_M68060:
+        m68k_set_feature(env, M68K_FEATURE_BRAL);
+        m68k_set_feature(env, M68K_FEATURE_BCCL);
+        m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+        m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+        m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
+        m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+        m68k_set_feature(env, M68K_FEATURE_FPU);
+    case M68K_CPUID_M68000:
+        m68k_set_feature(env, M68K_FEATURE_M68000);
+        m68k_set_feature(env, M68K_FEATURE_USP);
+        m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+        break;
     case M68K_CPUID_M5206:
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
+        m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
         break;
     case M68K_CPUID_M5208:
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
+        m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
         m68k_set_feature(env, M68K_FEATURE_BRAL);
         m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
         m68k_set_feature(env, M68K_FEATURE_USP);
@@ -120,16 +146,19 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
     case M68K_CPUID_CFV4E:
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
+        m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
         m68k_set_feature(env, M68K_FEATURE_BRAL);
         m68k_set_feature(env, M68K_FEATURE_CF_FPU);
         m68k_set_feature(env, M68K_FEATURE_CF_EMAC);
         m68k_set_feature(env, M68K_FEATURE_USP);
         break;
     case M68K_CPUID_ANY:
+        m68k_set_feature(env, M68K_FEATURE_M68000);
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_A);
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_B);
         m68k_set_feature(env, M68K_FEATURE_CF_ISA_APLUSC);
         m68k_set_feature(env, M68K_FEATURE_BRAL);
+        m68k_set_feature(env, M68K_FEATURE_BCCL);
         m68k_set_feature(env, M68K_FEATURE_CF_FPU);
         /* MAC and EMAC are mututally exclusive, so pick EMAC.
            It's mostly backwards compatible.  */
@@ -137,7 +166,11 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
         m68k_set_feature(env, M68K_FEATURE_CF_EMAC_B);
         m68k_set_feature(env, M68K_FEATURE_USP);
         m68k_set_feature(env, M68K_FEATURE_EXT_FULL);
+        m68k_set_feature(env, M68K_FEATURE_SCALED_INDEX);
         m68k_set_feature(env, M68K_FEATURE_WORD_INDEX);
+        m68k_set_feature(env, M68K_FEATURE_BITFIELD);
+        m68k_set_feature(env, M68K_FEATURE_LONG_MULDIV);
+        m68k_set_feature(env, M68K_FEATURE_QUAD_MULDIV);
         break;
     }
 
-- 
1.5.6.5