From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MAAmK-0002Xg-Er for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:21 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MAAmC-0002T6-6C for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:16 -0400 Received: from [199.232.76.173] (port=44631 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MAAmB-0002Sa-QB for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:11 -0400 Received: from smtp6-g21.free.fr ([212.27.42.6]:39321) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MAAmA-0007Kg-75 for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:10 -0400 From: Laurent Vivier Date: Sat, 30 May 2009 00:41:51 +0200 Message-Id: <1243636921-23054-8-git-send-email-laurent@vivier.eu> In-Reply-To: <1243636921-23054-7-git-send-email-laurent@vivier.eu> References: <1243636921-23054-1-git-send-email-laurent@vivier.eu> <1243636921-23054-2-git-send-email-laurent@vivier.eu> <1243636921-23054-3-git-send-email-laurent@vivier.eu> <1243636921-23054-4-git-send-email-laurent@vivier.eu> <1243636921-23054-5-git-send-email-laurent@vivier.eu> <1243636921-23054-6-git-send-email-laurent@vivier.eu> <1243636921-23054-7-git-send-email-laurent@vivier.eu> Subject: [Qemu-devel] [PATCH 07/17] m68k: add DBcc instruction. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Andreas Schwab , Laurent Vivier Define DBcc instruction and attach it to M68000 feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 26 ++++++++++++++++++++++++++ 1 files changed, 26 insertions(+), 0 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index d08e1c8..f2a0c92 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -923,6 +923,31 @@ DISAS_INSN(scc_mem) tcg_temp_free(dest); } +DISAS_INSN(dbcc) +{ + int l1; + TCGv reg; + TCGv tmp; + int16_t offset; + uint32_t base; + + reg = DREG(insn, 0); + base = s->pc; + offset = ldsw_code(s->pc); + s->pc += 2; + l1 = gen_new_label(); + gen_jmpcc(s, (insn >> 8) & 0xf, l1); + + tmp = tcg_temp_new(); + tcg_gen_ext16s_i32(tmp, reg); + tcg_gen_addi_i32(tmp, tmp, -1); + gen_partset_reg(OS_WORD, reg, tmp); + tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + gen_jmp_tb(s, 1, base + offset); + gen_set_label(l1); + gen_jmp_tb(s, 0, s->pc); +} + DISAS_INSN(undef_mac) { gen_exception(s, s->pc - 2, EXCP_LINEA); @@ -2994,6 +3019,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(scc, 50c0, f0f8, CF_ISA_A); INSN(scc_mem, 50c0, f0c0, M68000); INSN(scc, 50c0, f0f8, M68000); + INSN(dbcc, 50c8, f0f8, M68000); INSN(tpf, 51f8, fff8, CF_ISA_A); /* Branch instructions. */ -- 1.5.6.5