From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MAAmM-0002Yf-Ec for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MAAmC-0002Th-TQ for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:18 -0400 Received: from [199.232.76.173] (port=44637 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MAAmC-0002St-Bk for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:12 -0400 Received: from smtp1-g21.free.fr ([212.27.42.1]:35233) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MAAmA-0007Kq-Ie for qemu-devel@nongnu.org; Fri, 29 May 2009 18:42:11 -0400 From: Laurent Vivier Date: Sat, 30 May 2009 00:41:52 +0200 Message-Id: <1243636921-23054-9-git-send-email-laurent@vivier.eu> In-Reply-To: <1243636921-23054-8-git-send-email-laurent@vivier.eu> References: <1243636921-23054-1-git-send-email-laurent@vivier.eu> <1243636921-23054-2-git-send-email-laurent@vivier.eu> <1243636921-23054-3-git-send-email-laurent@vivier.eu> <1243636921-23054-4-git-send-email-laurent@vivier.eu> <1243636921-23054-5-git-send-email-laurent@vivier.eu> <1243636921-23054-6-git-send-email-laurent@vivier.eu> <1243636921-23054-7-git-send-email-laurent@vivier.eu> <1243636921-23054-8-git-send-email-laurent@vivier.eu> Subject: [Qemu-devel] [PATCH 08/17] m68k: modify movem instruction to manage word List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Andreas Schwab , Laurent Vivier This patch modifies "movem" to manage "word" and "long" register size instead of only "word". Attach it to M68000 feature. Signed-off-by: Andreas Schwab Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 52 +++++++++++++++++++++++++++++++++------------- 1 files changed, 37 insertions(+), 15 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index f2a0c92..c869cf9 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1176,6 +1176,8 @@ DISAS_INSN(movem) TCGv reg; TCGv tmp; int is_load; + int opsize; + int32_t incr; mask = lduw_code(s->pc); s->pc += 2; @@ -1187,21 +1189,40 @@ DISAS_INSN(movem) addr = tcg_temp_new(); tcg_gen_mov_i32(addr, tmp); is_load = ((insn & 0x0400) != 0); - for (i = 0; i < 16; i++, mask >>= 1) { - if (mask & 1) { - if (i < 8) - reg = DREG(i, 0); - else - reg = AREG(i, 0); - if (is_load) { - tmp = gen_load(s, OS_LONG, addr, 0); - tcg_gen_mov_i32(reg, tmp); - } else { - gen_store(s, OS_LONG, addr, reg); - } - if (mask != 1) - tcg_gen_addi_i32(addr, addr, 4); - } + opsize = (insn & 0x40) != 0 ? OS_LONG : OS_WORD; + incr = opsize_bytes(opsize); + if (!is_load && (insn & 070) == 040) { + for (i = 15; i >= 0; i--, mask >>= 1) { + if (mask & 1) { + if (i < 8) + reg = DREG(i, 0); + else + reg = AREG(i, 0); + gen_store(s, opsize, addr, reg); + if (mask != 1) + tcg_gen_subi_i32(addr, addr, incr); + } + } + tcg_gen_mov_i32(AREG(insn, 0), addr); + } else { + for (i = 0; i < 16; i++, mask >>= 1) { + if (mask & 1) { + if (i < 8) + reg = DREG(i, 0); + else + reg = AREG(i, 0); + if (is_load) { + tmp = gen_load(s, opsize, addr, 1); + tcg_gen_mov_i32(reg, tmp); + } else { + gen_store(s, opsize, addr, reg); + } + if (mask != 1 || (insn & 070) == 030) + tcg_gen_addi_i32(addr, addr, incr); + } + } + if ((insn & 070) == 030) + tcg_gen_mov_i32(AREG(insn, 0), addr); } } @@ -2975,6 +2996,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(swap, 4840, fff8, CF_ISA_A); INSN(swap, 4840, fff8, M68000); INSN(movem, 48c0, fbc0, CF_ISA_A); + INSN(movem, 48c0, fbc0, M68000); INSN(ext, 4880, fff8, CF_ISA_A); INSN(ext, 4880, fff8, M68000); INSN(ext, 48c0, fff8, CF_ISA_A); -- 1.5.6.5