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Subject: Re: [Qemu-devel] Re: [PATCH 1/3] m68k: allow fpu to manage double
	single data type.
From: Laurent Vivier <Laurent@vivier.eu>
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Date: Sun, 31 May 2009 14:57:12 +0200
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To: Andreas Schwab <schwab@linux-m68k.org>
Cc: qemu-devel@nongnu.org

Le dimanche 31 mai 2009 =C3=A0 14:03 +0200, Andreas Schwab a =C3=A9crit :
> Laurent Vivier <laurent@vivier.eu> writes:
>=20
> > +            if ((insn & 7) =3D=3D 4) {
> > +                src =3D gen_load64(s, tcg_const_i32(s->pc));
> > +                s->pc +=3D 8;
>=20
> This is wrong, it doesn't check that this is indeed a 7.4 addressing
> mode, but will match any other mode with register 4.
>=20
> > +                case 7:
> > +                    offset =3D ldsw_code(s->pc);
> > +                    offset +=3D s->pc - 2;
> > +                    s->pc +=3D 2;
> > +                    tcg_gen_addi_i32(tmp32, tmp32, offset);
> > +                    break;
>=20
> Btw, this is still broken, pc-rel addressing surely does not want the
> contents of register a2 added in (and the 68k supports all the indexed
> modes as well).  All non-immediate addresses should probably be handled
> by gen_lea.

Yes, I agree, I rework this part.

Laurent