From: Sebastian Herbszt <herbszt@gmx.de>
To: qemu-devel@nongnu.org
Cc: herbszt@gmx.de
Subject: [Qemu-devel] [PATCH 1/3] lsi53c895a: Implement Scratch Byte Register
Date: Sat, 13 Jun 2009 23:03:26 +0200 [thread overview]
Message-ID: <1244927006$1157@local> (raw)
Fixes the following errors:
lsi_scsi: error: Unhandled writeb 0x3a = 0x0
lsi_scsi: error: readb 0x3a
Signed-off-by: Sebastian Herbszt <herbszt@gmx.de>
Index: qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c
===================================================================
--- qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0.orig/hw/lsi53c895a.c
+++ qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c
@@ -262,6 +262,7 @@ typedef struct {
uint32_t sbc;
uint32_t csbc;
uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
+ uint8_t sbr;
/* Script ram is stored as 32-bit words in host byteorder. */
uint32_t script_ram[2048];
@@ -330,6 +331,7 @@ static void lsi_soft_reset(LSIState *s)
s->ia = 0;
s->sbc = 0;
s->csbc = 0;
+ s->sbr = 0;
}
static int lsi_dma_40bit(LSIState *s)
@@ -1408,6 +1410,8 @@ static uint8_t lsi_reg_readb(LSIState *s
return s->dmode;
case 0x39: /* DIEN */
return s->dien;
+ case 0x3a: /* SBR */
+ return s->sbr;
case 0x3b: /* DCNTL */
return s->dcntl;
case 0x40: /* SIEN0 */
@@ -1622,6 +1626,9 @@ static void lsi_reg_writeb(LSIState *s,
s->dien = val;
lsi_update_irq(s);
break;
+ case 0x3a: /* SBR */
+ s->sbr = val;
+ break;
case 0x3b: /* DCNTL */
s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD);
if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0)
next reply other threads:[~2009-06-13 21:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-13 21:03 Sebastian Herbszt [this message]
2009-06-13 21:03 ` [Qemu-devel] [PATCH 2/3] lsi53c895a: Implement read and write access to DMA Next Address Sebastian Herbszt
2009-06-13 21:03 ` [Qemu-devel] [PATCH 3/3] lsi53c895a: Implement write access to DMA Byte Counter Sebastian Herbszt
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