From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MFaP0-0006w6-If for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MFaOv-0006rI-JP for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:38 -0400 Received: from [199.232.76.173] (port=57604 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MFaOv-0006r7-FC for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:33 -0400 Received: from mail.gmx.net ([213.165.64.20]:40758) by monty-python.gnu.org with smtp (Exim 4.60) (envelope-from ) id 1MFaOu-00042H-MR for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:33 -0400 Date: Sat, 13 Jun 2009 23:03:26 +0200 Message-Id: <1244927006$1157@local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8bit From: Sebastian Herbszt Subject: [Qemu-devel] [PATCH 1/3] lsi53c895a: Implement Scratch Byte Register List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: herbszt@gmx.de Fixes the following errors: lsi_scsi: error: Unhandled writeb 0x3a = 0x0 lsi_scsi: error: readb 0x3a Signed-off-by: Sebastian Herbszt Index: qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c =================================================================== --- qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0.orig/hw/lsi53c895a.c +++ qemu-3a2eeac0c9033e30b19d88465c9561f982e9e6d0/hw/lsi53c895a.c @@ -262,6 +262,7 @@ typedef struct { uint32_t sbc; uint32_t csbc; uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */ + uint8_t sbr; /* Script ram is stored as 32-bit words in host byteorder. */ uint32_t script_ram[2048]; @@ -330,6 +331,7 @@ static void lsi_soft_reset(LSIState *s) s->ia = 0; s->sbc = 0; s->csbc = 0; + s->sbr = 0; } static int lsi_dma_40bit(LSIState *s) @@ -1408,6 +1410,8 @@ static uint8_t lsi_reg_readb(LSIState *s return s->dmode; case 0x39: /* DIEN */ return s->dien; + case 0x3a: /* SBR */ + return s->sbr; case 0x3b: /* DCNTL */ return s->dcntl; case 0x40: /* SIEN0 */ @@ -1622,6 +1626,9 @@ static void lsi_reg_writeb(LSIState *s, s->dien = val; lsi_update_irq(s); break; + case 0x3a: /* SBR */ + s->sbr = val; + break; case 0x3b: /* DCNTL */ s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD); if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0)