From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MFaP2-0006xa-6B for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:40 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MFaOw-0006ry-5h for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:38 -0400 Received: from [199.232.76.173] (port=57606 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MFaOw-0006rh-07 for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:34 -0400 Received: from mail.gmx.net ([213.165.64.20]:54388) by monty-python.gnu.org with smtp (Exim 4.60) (envelope-from ) id 1MFaOv-00042o-7s for qemu-devel@nongnu.org; Sat, 13 Jun 2009 17:04:33 -0400 In-Reply-To: <1244927006$1157@local> Date: Sat, 13 Jun 2009 23:03:29 +0200 Message-Id: <1244927008$1980@local> References: <1244927006$1157@local> <1244927007$499@local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 8bit From: Sebastian Herbszt Subject: [Qemu-devel] [PATCH 3/3] lsi53c895a: Implement write access to DMA Byte Counter List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: herbszt@gmx.de Adds CASE_SET_REG24 and fixes the following errors: lsi_scsi: error: Unhandled writeb 0x24 = 0x0 lsi_scsi: error: Unhandled writeb 0x25 = 0x0 Signed-off-by: Sebastian Herbszt Index: qemu-1172f6536247c8f5a382e6f9062034b1e9bec631/hw/lsi53c895a.c =================================================================== --- qemu-1172f6536247c8f5a382e6f9062034b1e9bec631.orig/hw/lsi53c895a.c +++ qemu-1172f6536247c8f5a382e6f9062034b1e9bec631/hw/lsi53c895a.c @@ -1492,6 +1492,11 @@ static uint8_t lsi_reg_readb(LSIState *s static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) { +#define CASE_SET_REG24(name, addr) \ + case addr : s->name &= 0xffffff00; s->name |= val; break; \ + case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ + case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break; + #define CASE_SET_REG32(name, addr) \ case addr : s->name &= 0xffffff00; s->name |= val; break; \ case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ @@ -1596,6 +1601,7 @@ static void lsi_reg_writeb(LSIState *s, } s->ctest5 = val; break; + CASE_SET_REG24(dbc, 0x24) CASE_SET_REG32(dnad, 0x28) case 0x2c: /* DSP[0:7] */ s->dsp &= 0xffffff00; @@ -1710,6 +1716,7 @@ static void lsi_reg_writeb(LSIState *s, BADF("Unhandled writeb 0x%x = 0x%x\n", offset, val); } } +#undef CASE_SET_REG24 #undef CASE_SET_REG32 }