From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MGyed-0005LT-HU for qemu-devel@nongnu.org; Wed, 17 Jun 2009 13:10:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MGyeU-0005CT-Tb for qemu-devel@nongnu.org; Wed, 17 Jun 2009 13:10:27 -0400 Received: from [199.232.76.173] (port=54828 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MGyeU-0005Bq-Gi for qemu-devel@nongnu.org; Wed, 17 Jun 2009 13:10:22 -0400 Received: from mx2.redhat.com ([66.187.237.31]:35951) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MGyeS-0007y1-Cr for qemu-devel@nongnu.org; Wed, 17 Jun 2009 13:10:21 -0400 From: Glauber Costa Date: Wed, 17 Jun 2009 13:09:54 -0400 Message-Id: <1245258604-2843-6-git-send-email-glommer@redhat.com> In-Reply-To: <1245258604-2843-5-git-send-email-glommer@redhat.com> References: <1245258604-2843-1-git-send-email-glommer@redhat.com> <1245258604-2843-2-git-send-email-glommer@redhat.com> <1245258604-2843-3-git-send-email-glommer@redhat.com> <1245258604-2843-4-git-send-email-glommer@redhat.com> <1245258604-2843-5-git-send-email-glommer@redhat.com> Subject: [Qemu-devel] [PATCH 05/15] e1000: Ignore reset command List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com, Kevin Wolf From: Kevin Wolf When a reset is requested, the current e1000 emulation never clears the reset bit which may cause a driver to hang. This patch masks the reset bit out when setting the control registert, so the reset is immediately completed. Signed-off-by: Kevin Wolf Signed-off-by: Anthony Liguori Signed-off-by: Glauber Costa --- hw/e1000.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/hw/e1000.c b/hw/e1000.c index 940e893..8c1741f 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -190,6 +190,13 @@ rxbufsize(uint32_t v) } static void +set_ctrl(E1000State *s, int index, uint32_t val) +{ + /* RST is self clearing */ + s->mac_reg[CTRL] = val & ~E1000_CTRL_RST; +} + +static void set_rx_control(E1000State *s, int index, uint32_t val) { s->mac_reg[RCTL] = val; @@ -783,12 +790,12 @@ enum { NREADOPS = ARRAY_SIZE(macreg_readops) }; static void (*macreg_writeops[])(E1000State *, int, uint32_t) = { putreg(PBA), putreg(EERD), putreg(SWSM), putreg(WUFC), putreg(TDBAL), putreg(TDBAH), putreg(TXDCTL), putreg(RDBAH), - putreg(RDBAL), putreg(LEDCTL), putreg(CTRL), putreg(VET), + putreg(RDBAL), putreg(LEDCTL), putreg(VET), [TDLEN] = set_dlen, [RDLEN] = set_dlen, [TCTL] = set_tctl, [TDT] = set_tctl, [MDIC] = set_mdic, [ICS] = set_ics, [TDH] = set_16bit, [RDH] = set_16bit, [RDT] = set_rdt, [IMC] = set_imc, [IMS] = set_ims, [ICR] = set_icr, - [EECD] = set_eecd, [RCTL] = set_rx_control, + [EECD] = set_eecd, [RCTL] = set_rx_control, [CTRL] = set_ctrl, [RA ... RA+31] = &mac_writereg, [MTA ... MTA+127] = &mac_writereg, [VFTA ... VFTA+127] = &mac_writereg, -- 1.6.2.2