From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>
Subject: Re: [PATCH 1/2] hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions
Date: Mon, 4 Nov 2024 11:23:51 +0100 [thread overview]
Message-ID: <124c839c-6e2e-4377-9d4c-825a2e8bde18@linaro.org> (raw)
In-Reply-To: <20241101161125.1901394-2-peter.maydell@linaro.org>
On 1/11/24 13:11, Peter Maydell wrote:
> Use the private peripheral interrupt definitions from bsa.h instead
> of defining them locally.
>
> Note that bsa.h defines these values as INTID values, which are all
> 16 greater than the PPI values that we were previously using. So we
> refactor the code to use INTID-based values to match that.
>
> This is the same thing we did in commit d40ab068c07d9 for sbsa-ref.
> It removes the "same constant, different values" confusion where this
> board code and bsa.h both define an ARCH_GIC_MAINT_IRQ, and allows us
> to use symbolic names for the timer interrupt IDs.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> hw/arm/aspeed_ast27x0.c | 19 ++++++++++---------
> 1 file changed, 10 insertions(+), 9 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2024-11-04 10:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-01 16:11 [PATCH 0/2] hw/arm/aspeed_ast27x0: minor IRQ number cleanup Peter Maydell
2024-11-01 16:11 ` [PATCH 1/2] hw/arm/aspeed_ast27x0: Use bsa.h for PPI definitions Peter Maydell
2024-11-01 18:22 ` Pierrick Bouvier
2024-11-04 10:23 ` Philippe Mathieu-Daudé [this message]
2024-11-01 16:11 ` [PATCH 2/2] hw/arm/aspeed_ast27x0: Avoid hardcoded '256' in IRQ calculation Peter Maydell
2024-11-01 18:23 ` Pierrick Bouvier
2024-11-04 10:24 ` Philippe Mathieu-Daudé
2025-01-30 15:02 ` Philippe Mathieu-Daudé
2025-02-03 5:10 ` Jamin Lin
2024-11-02 14:59 ` [PATCH 0/2] hw/arm/aspeed_ast27x0: minor IRQ number cleanup Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=124c839c-6e2e-4377-9d4c-825a2e8bde18@linaro.org \
--to=philmd@linaro.org \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=jamin_lin@aspeedtech.com \
--cc=joel@jms.id.au \
--cc=leetroy@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=steven_lee@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).