From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mh5Ob-00011q-ED for qemu-devel@nongnu.org; Fri, 28 Aug 2009 13:37:53 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mh5OW-0000uA-Hj for qemu-devel@nongnu.org; Fri, 28 Aug 2009 13:37:52 -0400 Received: from [199.232.76.173] (port=56530 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mh5OW-0000tt-CK for qemu-devel@nongnu.org; Fri, 28 Aug 2009 13:37:48 -0400 Received: from moutng.kundenserver.de ([212.227.126.177]:65190) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Mh5OV-0003OD-O2 for qemu-devel@nongnu.org; Fri, 28 Aug 2009 13:37:48 -0400 From: Stefan Weil Date: Fri, 28 Aug 2009 19:37:00 +0200 Message-Id: <1251481020-15407-1-git-send-email-weil@mail.berlios.de> In-Reply-To: <1251460100-11333-1-git-send-email-weil@mail.berlios.de> References: <1251460100-11333-1-git-send-email-weil@mail.berlios.de> Subject: [Qemu-devel] [PATCH] mips malta: Fix fdc regression and use qdev for i8042 setup List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann , Anthony Liguori , QEMU Developers 8baf73adf664e79eae201c3f618078a220a661d9 (qdev/isa: convert fdc) breaks MIPS Malta: Tried to create isa device isa-fdc with no isa bus present Fix this by creating an isa bus for piix4. This change also requires some more qdev related changes (similar changes were applied to pc.c) and allows cleaning of piix3/piix4 code. Thanks to Gerd Hoffmann for his hints. Signed-off-by: Stefan Weil --- hw/ide.h | 6 ++---- hw/ide/pci.c | 13 ++++--------- hw/mips_malta.c | 19 +++++++++++-------- hw/piix_pci.c | 1 + 4 files changed, 18 insertions(+), 21 deletions(-) diff --git a/hw/ide.h b/hw/ide.h index 56cf4ec..9fcbce6 100644 --- a/hw/ide.h +++ b/hw/ide.h @@ -10,10 +10,8 @@ void isa_ide_init(int iobase, int iobase2, qemu_irq irq, /* ide-pci.c */ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, int secondary_ide_enabled); -void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic); -void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic); +void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); +void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); /* ide-macio.c */ int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq, diff --git a/hw/ide/pci.c b/hw/ide/pci.c index a3d6bd0..bf5f278 100644 --- a/hw/ide/pci.c +++ b/hw/ide/pci.c @@ -443,8 +443,7 @@ static void piix3_reset(void *opaque) /* hd_table must contain 4 block drivers */ /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */ -void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic) +void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn) { PCIIDEState *d; uint8_t *pci_conf; @@ -484,8 +483,7 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, /* hd_table must contain 4 block drivers */ /* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */ -void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, - qemu_irq *pic) +void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn) { PCIIDEState *d; uint8_t *pci_conf; @@ -510,11 +508,8 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn, pci_register_bar((PCIDevice *)d, 4, 0x10, PCI_ADDRESS_SPACE_IO, bmdma_map); - /* - * These should call isa_reserve_irq() instead when MIPS supports it - */ - ide_init2(&d->bus[0], hd_table[0], hd_table[1], pic[14]); - ide_init2(&d->bus[1], hd_table[2], hd_table[3], pic[15]); + ide_init2(&d->bus[0], hd_table[0], hd_table[1], isa_reserve_irq(14)); + ide_init2(&d->bus[1], hd_table[2], hd_table[3], isa_reserve_irq(15)); ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6); ide_init_ioport(&d->bus[1], 0x170, 0x376); diff --git a/hw/mips_malta.c b/hw/mips_malta.c index a70d79e..d047424 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -765,6 +765,7 @@ void mips_malta_init (ram_addr_t ram_size, target_long bios_size; int64_t kernel_entry; PCIBus *pci_bus; + ISADevice *isa_dev; CPUState *env; RTCState *rtc_state; fdctrl_t *floppy_controller; @@ -904,9 +905,10 @@ void mips_malta_init (ram_addr_t ram_size, } piix4_devfn = piix4_init(pci_bus, 80); - pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1, i8259); + isa_bus_irqs(i8259); + pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); - smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, i8259[9]); + smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9)); eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ for (i = 0; i < 8; i++) { /* TODO: Populate SPD eeprom data. */ @@ -916,16 +918,17 @@ void mips_malta_init (ram_addr_t ram_size, qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256)); qdev_init(eeprom); } - pit = pit_init(0x40, i8259[0]); + pit = pit_init(0x40, isa_reserve_irq(0)); DMA_init(0); /* Super I/O */ - i8042_init(i8259[1], i8259[12], 0x60); - rtc_state = rtc_init(0x70, i8259[8], 2000); - serial_init(0x3f8, i8259[4], 115200, serial_hds[0]); - serial_init(0x2f8, i8259[3], 115200, serial_hds[1]); + isa_dev = isa_create_simple("i8042", 0x60, 0x64, 1, 12); + + rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); + serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]); + serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]); if (parallel_hds[0]) - parallel_init(0x378, i8259[7], parallel_hds[0]); + parallel_init(0x378, isa_reserve_irq(7), parallel_hds[0]); for(i = 0; i < MAX_FD; i++) { dinfo = drive_get(IF_FLOPPY, 0, i); fd[i] = dinfo ? dinfo->bdrv : NULL; diff --git a/hw/piix_pci.c b/hw/piix_pci.c index c9fef92..91fd038 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -365,6 +365,7 @@ static int piix4_initfn(PCIDevice *d) { uint8_t *pci_conf; + isa_bus_new(&d->qdev); register_savevm("PIIX4", 0, 2, piix_save, piix_load, d); pci_conf = d->config; -- 1.5.6.5