From: Glauber Costa <glommer@redhat.com>
To: qemu-devel@nongnu.org
Cc: aliguori@us.ibm.com
Subject: [Qemu-devel] [PATCH 1/6] provide in-kernel ioapic
Date: Mon, 28 Sep 2009 18:15:12 -0300 [thread overview]
Message-ID: <1254172517-28216-2-git-send-email-glommer@redhat.com> (raw)
In-Reply-To: <1254172517-28216-1-git-send-email-glommer@redhat.com>
This patch provides kvm with an in-kernel ioapic. We are currently not enabling it.
The code is heavily based on what's in qemu-kvm.git.
Signed-off-by: Glauber Costa <glommer@redhat.com>
---
hw/ioapic.c | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
kvm-all.c | 20 ++++++++++++++
kvm.h | 4 +++
3 files changed, 108 insertions(+), 1 deletions(-)
diff --git a/hw/ioapic.c b/hw/ioapic.c
index b0ad78f..3af86f1 100644
--- a/hw/ioapic.c
+++ b/hw/ioapic.c
@@ -24,10 +24,12 @@
#include "pc.h"
#include "qemu-timer.h"
#include "host-utils.h"
+#include "kvm.h"
//#define DEBUG_IOAPIC
#define IOAPIC_NUM_PINS 0x18
+#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
#define IOAPIC_LVT_MASKED (1<<16)
#define IOAPIC_TRIGGER_EDGE 0
@@ -191,6 +193,79 @@ static void ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t va
}
}
+#if defined(KVM_CAP_IRQCHIP) && defined(TARGET_I386)
+static void kvm_kernel_ioapic_load_from_user(IOAPICState *s)
+{
+ struct kvm_irqchip chip;
+ struct kvm_ioapic_state *kioapic;
+ int i;
+
+ chip.chip_id = KVM_IRQCHIP_IOAPIC;
+ kioapic = &chip.chip.ioapic;
+
+ kioapic->id = s->id;
+ kioapic->ioregsel = s->ioregsel;
+ kioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
+ kioapic->irr = s->irr;
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ kioapic->redirtbl[i].bits = s->ioredtbl[i];
+ }
+
+ kvm_set_irqchip(&chip);
+}
+
+static void kvm_kernel_ioapic_save_to_user(IOAPICState *s)
+{
+ struct kvm_irqchip chip;
+ struct kvm_ioapic_state *kioapic;
+ int i;
+
+ chip.chip_id = KVM_IRQCHIP_IOAPIC;
+ kvm_get_irqchip(&chip);
+ kioapic = &chip.chip.ioapic;
+
+ s->id = kioapic->id;
+ s->ioregsel = kioapic->ioregsel;
+ s->irr = kioapic->irr;
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ s->ioredtbl[i] = kioapic->redirtbl[i].bits;
+ }
+}
+#endif
+
+static void ioapic_pre_save(const void *opaque)
+{
+#if defined(KVM_CAP_IRQCHIP) && defined(TARGET_I386)
+ IOAPICState *s = (void *)opaque;
+
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ kvm_kernel_ioapic_save_to_user(s);
+ }
+#endif
+}
+
+static int ioapic_pre_load(void *opaque)
+{
+ IOAPICState *s = opaque;
+
+ /* in case we are doing version 1, we just set these to sane values */
+ s->irr = 0;
+ return 0;
+}
+
+static int ioapic_post_load(void *opaque)
+{
+#if defined(KVM_CAP_IRQCHIP) && defined(TARGET_I386)
+ IOAPICState *s = opaque;
+
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ kvm_kernel_ioapic_load_from_user(s);
+ }
+#endif
+ return 0;
+}
+
+
static const VMStateDescription vmstate_ioapic = {
.name = "ioapic",
.version_id = 1,
@@ -201,7 +276,10 @@ static const VMStateDescription vmstate_ioapic = {
VMSTATE_UINT8(ioregsel, IOAPICState),
VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICState, IOAPIC_NUM_PINS),
VMSTATE_END_OF_LIST()
- }
+ },
+ .pre_load = ioapic_pre_load,
+ .post_load = ioapic_post_load,
+ .pre_save = ioapic_pre_save,
};
static void ioapic_reset(void *opaque)
@@ -212,6 +290,11 @@ static void ioapic_reset(void *opaque)
memset(s, 0, sizeof(*s));
for(i = 0; i < IOAPIC_NUM_PINS; i++)
s->ioredtbl[i] = 1 << 16; /* mask LVT */
+#ifdef KVM_CAP_IRQCHIP
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ kvm_kernel_ioapic_load_from_user(s);
+ }
+#endif
}
static CPUReadMemoryFunc * const ioapic_mem_read[3] = {
diff --git a/kvm-all.c b/kvm-all.c
index f8a05cc..ff439a5 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -411,6 +411,26 @@ int kvm_check_extension(KVMState *s, unsigned int extension)
return ret;
}
+#ifdef KVM_CAP_IRQCHIP
+int kvm_set_irqchip(struct kvm_irqchip *chip)
+{
+ if (!kvm_state->irqchip_in_kernel) {
+ return 0;
+ }
+
+ return kvm_vm_ioctl(kvm_state, KVM_SET_IRQCHIP, chip);
+}
+
+int kvm_get_irqchip(struct kvm_irqchip *chip)
+{
+ if (!kvm_state->irqchip_in_kernel) {
+ return 0;
+ }
+
+ return kvm_vm_ioctl(kvm_state, KVM_GET_IRQCHIP, chip);
+}
+#endif
+
int kvm_init(int smp_cpus)
{
static const char upgrade_note[] =
diff --git a/kvm.h b/kvm.h
index e7d5beb..8d4afa0 100644
--- a/kvm.h
+++ b/kvm.h
@@ -16,6 +16,7 @@
#include "config.h"
#include "qemu-queue.h"
+#include <linux/kvm.h>
#ifdef CONFIG_KVM
extern int kvm_allowed;
@@ -63,6 +64,9 @@ int kvm_update_guest_debug(CPUState *env, unsigned long reinject_trap);
int kvm_pit_in_kernel(void);
int kvm_irqchip_in_kernel(void);
+int kvm_set_irqchip(struct kvm_irqchip *chip);
+int kvm_get_irqchip(struct kvm_irqchip *chip);
+
/* internal API */
struct KVMState;
--
1.6.2.5
next prev parent reply other threads:[~2009-09-28 21:15 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-28 21:15 [Qemu-devel] [PATCH 0/6] in kernel irqchip support Glauber Costa
2009-09-28 21:15 ` Glauber Costa [this message]
2009-09-28 21:15 ` [Qemu-devel] [PATCH 2/6] provide in-kernel apic Glauber Costa
2009-09-28 21:15 ` [Qemu-devel] [PATCH 3/6] provide apic_set_irq_delivered Glauber Costa
2009-09-28 21:15 ` [Qemu-devel] [PATCH 4/6] provide in-kernel i8259 chip Glauber Costa
2009-09-28 21:15 ` [Qemu-devel] [PATCH 5/6] initialize " Glauber Costa
2009-09-28 21:15 ` [Qemu-devel] [PATCH 6/6] Initialize in-kernel irqchip Glauber Costa
2009-10-02 20:33 ` [Qemu-devel] " Jan Kiszka
2009-10-02 21:59 ` Jamie Lokier
2009-10-02 22:22 ` Glauber Costa
2009-09-28 22:04 ` [Qemu-devel] Re: [PATCH 4/6] provide in-kernel i8259 chip Juan Quintela
2009-09-28 22:25 ` Glauber Costa
2009-09-28 22:39 ` Juan Quintela
2009-10-02 20:33 ` Jan Kiszka
[not found] ` <m3my4eagcp.fsf@neno.mitica>
2009-09-28 22:24 ` [Qemu-devel] Re: [PATCH 1/6] provide in-kernel ioapic Glauber Costa
2009-09-29 0:39 ` [Qemu-devel] [PATCH 0/6] in kernel irqchip support Jamie Lokier
2009-09-29 1:06 ` Glauber Costa
2009-09-29 8:15 ` Avi Kivity
2009-09-30 20:01 ` Anthony Liguori
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