From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MvbM9-0004cD-6M for qemu-devel@nongnu.org; Wed, 07 Oct 2009 14:35:21 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MvbM4-0004Vc-FG for qemu-devel@nongnu.org; Wed, 07 Oct 2009 14:35:20 -0400 Received: from [199.232.76.173] (port=53463 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MvbM4-0004VK-3n for qemu-devel@nongnu.org; Wed, 07 Oct 2009 14:35:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:6628) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MvbM3-0007Lz-ND for qemu-devel@nongnu.org; Wed, 07 Oct 2009 14:35:15 -0400 From: Glauber Costa Date: Wed, 7 Oct 2009 14:35:13 -0400 Message-Id: <1254940513-7180-1-git-send-email-glommer@redhat.com> Subject: [Qemu-devel] [PATCH] save kvm-specific msrs over save/load List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: aliguori@us.ibm.com Although we currently do not register a pvclock, there is no harm in saving the values of the involved msrs. We'll just load an empty value. qemu-kvm, OTOH, will make the correct use of it, so I think it is better to do it here, than to augment the diff. Signed-off-by: Glauber Costa --- target-i386/cpu.h | 4 +++- target-i386/kvm.c | 11 +++++++++++ target-i386/machine.c | 3 +++ 3 files changed, 17 insertions(+), 1 deletions(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 5929d28..ff7ae99 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -693,6 +693,8 @@ typedef struct CPUX86State { /* For KVM */ uint64_t interrupt_bitmap[256 / 64]; uint32_t mp_state; + uint64_t system_time_msr; + uint64_t wall_clock_msr; /* in order to simplify APIC support, we leave this pointer to the user */ @@ -870,7 +872,7 @@ uint64_t cpu_get_tsc(CPUX86State *env); #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list -#define CPU_SAVE_VERSION 11 +#define CPU_SAVE_VERSION 12 /* MMU modes definitions */ #define MMU_MODE0_SUFFIX _kernel diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 7010999..a1c2fae 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -17,6 +17,7 @@ #include #include +#include #include "qemu-common.h" #include "sysemu.h" @@ -484,6 +485,8 @@ static int kvm_put_msrs(CPUState *env) kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask); kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar); #endif + kvm_msr_entry_set(&msrs[n++], MSR_KVM_SYSTEM_TIME, env->system_time_msr); + kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr); msr_data.info.nmsrs = n; return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data); @@ -617,6 +620,8 @@ static int kvm_get_msrs(CPUState *env) msrs[n++].index = MSR_FMASK; msrs[n++].index = MSR_LSTAR; #endif + msrs[n++].index = MSR_KVM_SYSTEM_TIME; + msrs[n++].index = MSR_KVM_WALL_CLOCK; msr_data.info.nmsrs = n; ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data); if (ret < 0) @@ -653,6 +658,12 @@ static int kvm_get_msrs(CPUState *env) case MSR_IA32_TSC: env->tsc = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME: + env->system_time_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK: + env->wall_clock_msr = msrs[i].data; + break; } } diff --git a/target-i386/machine.c b/target-i386/machine.c index b13eff4..5ba2b6c 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -475,6 +475,9 @@ const VMStateDescription vmstate_cpu = { VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10), /* rdtscp */ VMSTATE_UINT64_V(tsc_aux, CPUState, 11), + /* kvm specific msrs */ + VMSTATE_UINT64_V(system_time_msr, CPUState, 12), + VMSTATE_UINT64_V(wall_clock_msr, CPUState, 12), VMSTATE_END_OF_LIST() } }; -- 1.6.2.2