From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NCfrY-0001mg-Lq for qemu-devel@nongnu.org; Mon, 23 Nov 2009 15:50:20 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NCfrT-0001jh-5S for qemu-devel@nongnu.org; Mon, 23 Nov 2009 15:50:20 -0500 Received: from [199.232.76.173] (port=52907 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NCfrS-0001jW-TQ for qemu-devel@nongnu.org; Mon, 23 Nov 2009 15:50:15 -0500 Received: from mx20.gnu.org ([199.232.41.8]:27621) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NCfrS-0005O8-LM for qemu-devel@nongnu.org; Mon, 23 Nov 2009 15:50:14 -0500 Received: from mail.codesourcery.com ([38.113.113.100]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NCfrQ-0008Pb-Qu for qemu-devel@nongnu.org; Mon, 23 Nov 2009 15:50:13 -0500 From: Nathan Froyd Date: Mon, 23 Nov 2009 12:49:58 -0800 Message-Id: <1259009409-2755-1-git-send-email-froydnj@codesourcery.com> Subject: [Qemu-devel] [PATCH 00/11] target-mips: add mips16 support List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This patchset adds MIPS16 support to the MIPS backend. MIPS16 is a compact encoding of a subset of the MIPS integer instructions, similar to ARM's Thumb mode. The processor enters MIPS16 mode by executing a special jump instruction; execution continus at the jump target in MIPS16 mode until the processor returns to MIPS32/64 mode by executing a special jump instruction. The patches have been tested with GCC's testsuite and GDB's testsuite. -Nathan