[Qemu-devel] [PATCH 02/11] target-mips: add new HFLAGs for JALX and 16/32-bit delay slots

[Nathan Froyd <froydnj@codesourcery.com>]

We create separate masks for the "basic" branch hflags and the
"extended" branch hflags and define MIPS_HFLAG_BMASK as the logical or
of those two.  This is done to avoid churning the codebase in lots of
different places.

Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
---
 target-mips/cpu.h |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index e8febe6..9413be0 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -441,11 +441,17 @@ struct CPUMIPSState {
      * the delay slot, record what type of branch it is so that we can
      * resume translation properly.  It might be possible to reduce
      * this from three bits to two.  */
-#define MIPS_HFLAG_BMASK  0x1C00
+#define MIPS_HFLAG_BMASK_BASE  0x1C00
 #define MIPS_HFLAG_B      0x0400 /* Unconditional branch               */
 #define MIPS_HFLAG_BC     0x0800 /* Conditional branch                 */
 #define MIPS_HFLAG_BL     0x0C00 /* Likely branch                      */
 #define MIPS_HFLAG_BR     0x1000 /* branch to register (can't link TB) */
+    /* Extra flags about the current pending branch.  */
+#define MIPS_HFLAG_BMASK_EXT 0xE000
+#define MIPS_HFLAG_BDS16  0x2000 /* branch requires 16-bit delay slot  */
+#define MIPS_HFLAG_BDS32  0x4000 /* branch requires 32-bit delay slot  */
+#define MIPS_HFLAG_BX     0x8000 /* branch exchange execution mode     */
+#define MIPS_HFLAG_BMASK  (MIPS_HFLAG_BMASK_BASE | MIPS_HFLAG_BMASK_EXT)
     target_ulong btarget;        /* Jump / branch target               */
     target_ulong bcond;          /* Branch condition (if needed)       */
 
-- 
1.6.3.2