From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NGLyo-0000DN-H3 for qemu-devel@nongnu.org; Thu, 03 Dec 2009 19:25:02 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NGLyj-0000BR-S0 for qemu-devel@nongnu.org; Thu, 03 Dec 2009 19:25:01 -0500 Received: from [199.232.76.173] (port=37592 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NGLyj-0000BI-Iy for qemu-devel@nongnu.org; Thu, 03 Dec 2009 19:24:57 -0500 Received: from cantor.suse.de ([195.135.220.2]:49097 helo=mx1.suse.de) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NGLyj-00054p-Da for qemu-devel@nongnu.org; Thu, 03 Dec 2009 19:24:57 -0500 From: Alexander Graf Date: Fri, 4 Dec 2009 01:24:52 +0100 Message-Id: <1259886292-12588-1-git-send-email-agraf@suse.de> Subject: [Qemu-devel] [PATCH] [0.12] Map BIOS f-segment as RAM, not as ROM List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Kevin O'Connor , Gleb Natapov , Aurelien Jarno , Sebastian Herbszt SeaBIOS needs to write to the f-segment. So it needs to have some way to set that from read-only to read-write, write in it and when it's done set it to read-only again. On PCI we have a mechanism for that. The ISA machine does not though. To stay regression free and happily enable users to continue using the -M isapc machine let's just map it as RAM on the ISA PC. Signed-off-by: Alexander Graf --- hw/pc.c | 22 ++++++++++++++++++++-- 1 files changed, 20 insertions(+), 2 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 8c1b7ea..90373cf 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -982,7 +982,7 @@ static void pc_init1(ram_addr_t ram_size, int ret, linux_boot, i; ram_addr_t ram_addr, bios_offset, option_rom_offset; ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; - int bios_size, isa_bios_size; + int bios_size, isa_bios_size, f_seg_type; PCIBus *pci_bus; ISADevice *isa_dev; int piix3_devfn = -1; @@ -1073,9 +1073,27 @@ static void pc_init1(ram_addr_t ram_size, isa_bios_size = bios_size; if (isa_bios_size > (128 * 1024)) isa_bios_size = 128 * 1024; + + /* XXX + * + * Usually we would map this region read only, have the BIOS set it r/w + * when it needs to and have the BIOS also set it r/o when it's done + * messing with it. + * + * Unfortunately we don't export any device to the ISA PC machine that + * could do the r/w <-> r/o transition, so let's just always map it r/w + * there for now. + */ + + if (pci_enabled) { + f_seg_type = IO_MEM_ROM; + } else { + f_seg_type = 0; + } + cpu_register_physical_memory(0x100000 - isa_bios_size, isa_bios_size, - (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); + (bios_offset + bios_size - isa_bios_size) | f_seg_type); -- 1.6.0.2