From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NKXgu-0001iN-9E for qemu-devel@nongnu.org; Tue, 15 Dec 2009 08:43:52 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NKXgp-0001el-Gr for qemu-devel@nongnu.org; Tue, 15 Dec 2009 08:43:51 -0500 Received: from [199.232.76.173] (port=47371 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NKXgp-0001eZ-7f for qemu-devel@nongnu.org; Tue, 15 Dec 2009 08:43:47 -0500 Received: from moutng.kundenserver.de ([212.227.126.171]:58815) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NKXgo-0005U1-Lr for qemu-devel@nongnu.org; Tue, 15 Dec 2009 08:43:47 -0500 From: Stefan Weil Date: Tue, 15 Dec 2009 14:43:40 +0100 Message-Id: <1260884620-7810-1-git-send-email-weil@mail.berlios.de> In-Reply-To: References: Subject: [Qemu-devel] [PATCH] target-mips: 4Kc, 4KEc cores do not support MIPS16 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nathan Froyd , Aurelien Jarno , QEMU Developers 4Kc, 4KEc cores do not support MIPS16, so not only the CP0_Config1 had to be fixed (see previous patch), but also MIPS16 instructions must not be executed. (Hint from Nathan Froyd, thanks). Signed-off-by: Stefan Weil --- target-mips/translate_init.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index b710979..b79ed56 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -115,7 +115,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32 | ASE_MIPS16, + .insn_flags = CPU_MIPS32, .mmu_type = MMU_TYPE_R4000, }, { @@ -157,7 +157,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32 | ASE_MIPS16, + .insn_flags = CPU_MIPS32, .mmu_type = MMU_TYPE_R4000, }, { @@ -198,7 +198,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32R2 | ASE_MIPS16, + .insn_flags = CPU_MIPS32R2, .mmu_type = MMU_TYPE_R4000, }, { -- 1.6.5